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今天看了别人的代码才稍微搞懂了点DMA.
Direct Memory Access (DMA) is a mechanism for transferring data without executing instructions in the processor core.说白了就是不用内核的参与进行数据的传输.
有以上几种传输种类,注意:
Internal-to-internal memory transfers are not directly supported. Transfers may be executed through the multiprocessing space, although this loads the cluster bus.
至于有什么14通道,4个负责与外部存储器设备,8条负责链路口,2条负责自动DMA寄存器的数据传输.而且优先级也都不同(递增)这些就不详细说了.
The TigerSHARC processor also has four external DMA request pins (DMAR3–0) that allow for external I/O devices to request DMA services. As a response to the DMA request, the TigerSHARC processor performs DMA transfers according to DMA channel initialization. 这一段貌似还没能够运用起来
manual里面说了,要用DMA首先得对它的寄存器编程(TCB)
1.The DI register is the 32-bit Index register for the DMA. This contains the source or destination of the data to be transmitted or received and can point to internal, external memory, or the link ports.这里说DI是存储源地址或者目的地址的
2.The DX register contains a 16-bit count value and a 16-bit modify value. The count value is stored in the upper 16 bits (16-31) and the modify in the lower (0-15). If a two-dimensional DMA is enabled, then this register contains the modify and count values for the X dimension only. The value of X count must always be the number of normal (32-bit) words to be transferred. Likewise, the modify value is the number of normal words to modify the count. For example, if we wanted to transmit four quad-words (16 normal words), then the count value would be 0x10 and the modify value 0x4 if the operand length in the DP register is set to quad-word. If the operand length was set to long-word, then the modify value would be 0x2. 这里的DX主要是控制传输的字节数(寻址大小)和字节增量的.重要的是后面那一段话,说到如果长度改为long-word而不再是quad-word那么DX值就相应的要改变.(DP可以控制是long-word还是quad-word)
3.DY,和DX一样,不过要开启二维DMA.(如何开启?通过控制DP这个寄存器)
4.The DP register contains all the control information for the DMA.DP分为两部分
a) Bits 23-31 : 专用于DMA控制
b) Bits 0-22 : 专用于链式DMA控制,链表地址
具体为:
Bits 0-14 : CHPT --下一个TCB的首地址的 Bits 16~2, Bit1 bits0 都为 0 (四字节对齐)
Bits 15-16 : MS -- 链式TCB表的存储位置 / 内部存储空间(block0,1,2)的片选
Bits 17-21 : CHTG – chaining destination chanal该链的DMA通道
Bits 22 : CHEN --链式DMA使能.
Bits 23 : DRQ -- DMA申请使能(DMAR3:0)
Bits 24 : INT -- 中断使能 1=enable
Bits 25-26 : LEN -- DMA单位长度 00=reseved / 01=normal / 10=long-word(64bits) / 11=quad-word(128bits)
Bits 27 : 2DDMA -- 二维使能
Bits 28 : PR -- DMA申请总线优先级 0=normal / 1=hight
Bits 29-31 : TY -- DMA设备类型
000 DMA disable 100 external memory
001 I/O link ports 101 external I/O device
010 Internal memory 110 BOOT EPROM
011 reserved 111 reserved
最后一步:The cluster bus (EP) TCBs are loaded by writing to the DCSx registers for the source TCB and the DCDx registers for the destination TCBs, where x can be any value ranging from 0 to 3. The DCx registers are written-to, in order to load the TCBs for the link ports or the AutoDMA registers. The X can be any value from 4 to 13 depending on whether you are writing to link port receive, transmit, or AutoDMA channels. 就是说DCSx存源地址,DCDx存目的地址,可以传出和接收.而DCx只用于link port和auto DMA.
外部设备可以通过4个边沿触发的DMAR信号申请DMA
当然,后面肯定会有用到查看DMA状态的,这时就需要读DSTAT寄存器(注意只能long或者quad word访问).它可以查看是正在传输还是传输结束还是有错误等.
而通过DMA控制寄存器可以控制传输的暂停等(DCNT DCNTST DCNTCL)
我觉得强大的还有链式DMA,DMA的中断,就是不知道用.如链式的DMA如何插入等.(插入需要先通过DCNT寄存器暂停当前的,然后将当前的TCB中的原来的CHPT设置到要插入的DMA链的TCB中,接着DSP内核改写当前DMA的TCB,更新其中的CHPT(指向新的DMA链),最后动过DCNT寄存器恢复当前的DMA传输)
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原文地址:http://www.cnblogs.com/yujone/p/5222845.html