不同ISA的一些特点

通常x86架构的字节码长度是不固定的，x64也也沿袭了这种做法。

ARM架构则是具有固定长度的字节码。

在最开始的时候，所有的ARM指令都被编码为4字节。这被称为ARM mode。

后来发现可以压缩到两个字节。这被称为Thumb mode

＊ Thumb mode和ARM mode可能会同时存在于一个程序中。

在ARMv7中，又出现了Thumb-2.Thumb-2则在Thumb之外又加入了一些长度为4字节的指令。

ARM64的机器码则都是4字节长度的

＊ many other RISC ISAs with fixed length 32-bit opcodes, such as MIPS, PowerPC and Alpha AXP. 

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The x86 ISA has always been one with variable-length opcodes, so when the 64-bit era came, the x64 extensions did not impact the ISA very significantly. In fact, the x86 ISA still contains a lot of instructions that first appeared in 16-bit 8086 CPU, yet are still found in the CPUs of today. ARM is a RISC3 CPU designed with constant-length opcode in mind, which had some advantages in the past. In the very beginning, all ARM instructions were encoded in 4 bytes4. This is now referred to as “ARM mode”. Then they thought it wasn’t as frugal as they first imagined. In fact, most used CPU instructions5 in real world applications can be encoded using less information. They therefore added another ISA, called Thumb, where each instruction was encoded in just 2 bytes. This is now referred as “Thumb mode”. However, not all ARM instructions can be encoded in just 2 bytes, so the Thumb instruction set is somewhat limited. It is worth noting that code compiled for ARM mode and Thumb mode may of course coexist within one single program. The ARM creators thought Thumb could be extended, giving rise to Thumb-2, which appeared in ARMv7. Thumb-2 still uses 2-byte instructions, but has some new instructions which have the size of 4 bytes. There is a common misconception that Thumb-2 is a mix of ARM and Thumb. This is incorrect. Rather, Thumb- 2 was extended to fully support all processor features so it could compete with ARM mode—a goal that was clearly achieved, as the majority of applications for iPod/iPhone/iPad are compiled for the Thumb-2 instruction set (admittedly, largely due to the fact that Xcode does this by default). Later the 64-bit ARM came out. This ISA has 4-byte opcodes, and lacked the need of any additional Thumb mode. However, the 64-bit requirements affected the ISA, resulting in us now having three ARM instruction sets: ARM mode, Thumb mode (including Thumb-2) and ARM64. These ISAs intersect partially, but it can be said that they are different ISAs, rather than variations of the same one. Therefore, we would try to add fragments of code in all three ARM ISAs in this book. There are, by the way, many other RISC ISAs with fixed length 32-bit opcodes, such as MIPS, PowerPC and Alpha AXP.