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1 OVERVIEW OF S5PV210
1.1 ARCHITECTURAL OVERVIEW
S5PV210 is a 32-bit RISC cost-effective, low power, andhigh performance microprocessor solution for mobile
phones and general applications. It
integrates the ARM Cortex-A8 core, which implements the ARM architecture
V7-A with supporting peripherals.
S5PV210是一个32位RISC高性价比、低功耗、高性能微处理器，为电话和一般应用而提出的移动解决方案。
它集成了ARM Cortex-A8内核，实现了ARM的体系结构V7-a用来支持外设。
To provideoptimized
Hardware (H/W) performance for the 3G and 3.5G communication services, S5PV210
adopts 64-bit internal bus architecture. This includes many powerful hardware accelerators for tasks such as
motion video processing,
display control, and scaling. Integrated Multi Format Codec (MFC) supportsencoding
and decoding of MPEG-1/2/4, H.263, and H.264, and decoding of VC1. This hardware accelerator (MFC) supports
real-time
video conferencing and Analog TV out, HDMI for NTSC, and PAL mode.
为3G和3.5G通信提供优化的硬件（H / W）的服务性能，S5PV210采用64位内部总线架构。
这包括许多功能强大的硬件加速器的任务，如运动视频处理，显示控制，缩放。集成多格式编解码器（MFC）支持编码
解码MPEG-1／2／4，H.263，H.264，VC1和解码。这种硬件加速器（MFC）支持
实时视频会议和模拟电视，HDMI的NTSC，PAL模式。
S5PV210
has an interface to external memory that is capable of sustaining heavy memory bandwidths required in
high-end communication services. The memory system has Flash/ ROM external memory ports forparallelaccess
and
DRAM port to meet high bandwidths. DRAM controller supports LPDDR1 (mobile DDR), DDR2, or LPDDR2.
S5PV210有一个外部存储器接口，在高端通信服务中能够承受沉重的内存带宽要求。
存储器系统具有并行访问的外部存储器接口和DRAM端口来满足高带宽。
DRAM控制器支持lpddr1（Mobile DDR、DDR2、或LPDDR2）。
Flash/
ROM port supports NAND Flash, NOR-Flash, OneNAND, SRAM, and ROM type external memory.
Flash ROM接口支持NAND闪存，NOR闪存、SRAM、ROM型OneNAND，外部存储器。
To
reduce the total system cost and enhance the
overall functionality, S5PV210 includes many hardware
peripherals such as TFT 24-bit true color LCD controller, Camera Interface, MIPI DSI, CSI-2, System Manager for
power management, ATA interface, four UARTs, 24-channel DMA, five Timers, General I/O Ports, three I2S,
S/PDIF, three (general purpose) IIC-BUS interfaces, two HS-SPI, USB Host 2.0, USB 2.0 OTG operating at high
speed
(480Mbps), four SD Host and high-speed Multimedia Card Interface, and four PLLs for clock generation.
为了降低系统总成本和提高整体功能，S5PV210包括许多硬件外设如TFT 24位真彩色LCD控制器、摄像头接口，MIPI DSI、CSI-2、
电源管理系统，ATA接口、四个UART、24通道DMA、五定时器、通用I / O端口，三个I2S，
S / PDIF，三（通用）iic-bus接口，两hs-spi，USB 2.0，USB 2 OTG操作在高
高速（480Mbps），四的SD卡和高速多媒体卡接口，和四个锁相环时钟产生。
Package
on Package (POP) option with MCP is available for small form factor applications.
封装（POP）选项与MCP可小的形式因素的应用。
s5pv210 datasheet_overview
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原文地址：http://blog.csdn.net/qq_18973645/article/details/51355693
