msp头文件中文

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1. MSP430寄存器中文注释---P1/2口（带中断功能）  
2.       /************************************************************ 
3.       * DIGITAL I/O Port1/2 寄存器定义 有中断功能 
4.       ************************************************************/  
5.       #define P1IN_               0x0020  /* P1 输入寄存器 */  
6.       const sfrb P1IN           = P1IN_;  
7.       #define P1OUT_              0x0021  /* P1 输出寄存器 */  
8.       sfrb    P1OUT             = P1OUT_;  
9.       #define P1DIR_              0x0022  /* P1 方向选择寄存器 */  
10.       sfrb    P1DIR             = P1DIR_;  
11.       #define P1IFG_              0x0023  /* P1 中断标志寄存器*/  
12.       sfrb    P1IFG             = P1IFG_;  
13.       #define P1IES_              0x0024  /* P1 中断边沿选择寄存器*/  
14.       sfrb    P1IES             = P1IES_;  
15.       #define P1IE_               0x0025  /* P1 中断使能寄存器 */  
16.       sfrb    P1IE              = P1IE_;  
17.       #define P1SEL_              0x0026  /* P1 功能选择寄存器*/  
18.       sfrb    P1SEL             = P1SEL_;  
19.       #define P2IN_               0x0028  /* P2 输入寄存器 */  
20.       const sfrb P2IN           = P2IN_;  
21.       #define P2OUT_              0x0029  /* P2 输出寄存器  */  
22.       sfrb    P2OUT             = P2OUT_;  
23.       #define P2DIR_              0x002A  /* P2 方向选择寄存器  */  
24.       sfrb    P2DIR             = P2DIR_;  
25.       #define P2IFG_              0x002B  /* P2 中断标志寄存器 */  
26.       sfrb    P2IFG             = P2IFG_;  
27.       #define P2IES_              0x002C  /* P2 中断边沿选择寄存器 */  
28.       sfrb    P2IES             = P2IES_;  
29.       #define P2IE_               0x002D  /* P2 中断使能寄存器 */  
30.       sfrb    P2IE              = P2IE_;  
31.       #define P2SEL_              0x002E  /* P2 功能选择寄存器 */  
32.       sfrb    P2SEL             = P2SEL_;  
33.       MSP430寄存器中文注释---P3/4口 （无中断功能）  
34.       /************************************************************ 
35.       * DIGITAL I/O Port3/4寄存器定义 无中断功能 
36.       ************************************************************/  
37.       #define P3IN_               0x0018  /* P3 输入寄存器 */  
38.       const sfrb P3IN           = P3IN_;  
39.       #define P3OUT_              0x0019  /* P3 输出寄存器 */  
40.       sfrb    P3OUT             = P3OUT_;  
41.       #define P3DIR_              0x001A  /* P3 方向选择寄存器 */  
42.       sfrb    P3DIR             = P3DIR_;  
43.       #define P3SEL_              0x001B  /* P3 功能选择寄存器*/  
44.       sfrb    P3SEL             = P3SEL_;  
45.       #define P4IN_               0x001C  /* P4 输入寄存器 */  
46.       const sfrb P4IN           = P4IN_;  
47.       #define P4OUT_              0x001D  /* P4 输出寄存器 */  
48.       sfrb    P4OUT             = P4OUT_;  
49.       #define P4DIR_              0x001E  /* P4 方向选择寄存器 */  
50.       sfrb    P4DIR             = P4DIR_;  
51.       #define P4SEL_              0x001F  /* P4 功能选择寄存器 */  
52.       sfrb    P4SEL             = P4SEL_;  
53.       /************************************************************ 
54.       * DIGITAL I/O Port5/6       I/O口寄存器定义PORT5和6  无中断功能 
55.       ************************************************************/  
56.       #define P5IN_               0x0030  /* P5 输入寄存器 */  
57.       const sfrb P5IN           = P5IN_;  
58.       #define P5OUT_              0x0031  /* P5 输出寄存器*/  
59.       sfrb    P5OUT             = P5OUT_;  
60.       #define P5DIR_              0x0032  /* P5 方向选择寄存器*/  
61.       sfrb    P5DIR             = P5DIR_;  
62.       #define P5SEL_              0x0033  /* P5 功能选择寄存器*/  
63.       sfrb    P5SEL             = P5SEL_;  
64.       #define P6IN_               0x0034  /* P6 输入寄存器 */  
65.       const sfrb P6IN           = P6IN_;  
66.       #define P6OUT_              0x0035  /* P6 输出寄存器*/  
67.       sfrb    P6OUT             = P6OUT_;  
68.       #define P6DIR_              0x0036  /* P6 方向选择寄存器*/  
69.       sfrb    P6DIR             = P6DIR_;  
70.       #define P6SEL_              0x0037  /* P6 功能选择寄存器*/  
71.       sfrb    P6SEL             = P6SEL_;  
72.       MSP430寄存器中文注释--- 硬件乘法器  
73.       /************************************************************ 
74.                    硬件乘法器的寄存器定义 
75.       ************************************************************/  
76.       #define MPY_                0x0130  /* 无符号乘法 */  
77.       sfrw    MPY               = MPY_;  
78.       #define MPYS_               0x0132  /* 有符号乘法*/  
79.       sfrw    MPYS              = MPYS_;  
80.       #define MAC_                0x0134  /* 无符号乘加 */  
81.       sfrw    MAC               = MAC_;  
82.       #define MACS_               0x0136  /* 有符号乘加 */  
83.       sfrw    MACS              = MACS_;  
84.       #define OP2_                0x0138  /* 第二乘数 */  
85.       sfrw    OP2               = OP2_;  
86.       #define RESLO_              0x013A  /* 低6位结果寄存器 */  
87.       sfrw    RESLO             = RESLO_;  
88.       #define RESHI_              0x013C  /* 高6位结果寄存器 */  
89.       sfrw    RESHI             = RESHI_;  
90.       #define SUMEXT_             0x013E  /*结果扩展寄存器  */  
91.       const sfrw SUMEXT         = SUMEXT_;  
92.       MSP430寄存器中文注释---看门狗和定时器  
93.       /************************************************************ 
94.       *           看门狗定时器的寄存器定义 
95.       ************************************************************/  
96.       #define WDTCTL_             0x0120   
97.       sfrw    WDTCTL            = WDTCTL_;  
98.       #define WDTIS0              0x0001          /*选择WDTCNT的四个输出端之一*/  
99.       #define WDTIS1              0x0002          /*选择WDTCNT的四个输出端之一*/  
100.       #define WDTSSEL             0x0004          /*选择WDTCNT的时钟源*/  
101.       #define WDTCNTCL            0x0008          /*清除WDTCNT端: 为1时 从0开始计数*/     
102.       #define WDTTMSEL            0x0010          /*选择模式  0: 看门狗模式; 1: 定时器模式*/   
103.       #define WDTNMI              0x0020          /*选择NMI/RST 引脚功能 0:为 RST;   
104.       1:为NMI*/  
105.       #define WDTNMIES            0x0040          /*WDTNMI=1时.选择触发延 0:为上升延   
106.       1:为下降延*/   
107.       #define WDTHOLD             0x0080          /*停止看门狗定时器工作 0:启动;1:停止*/  
108.       #define WDTPW               0x5A00          /* 写密码:高八位*/   
109.       /* SMCLK= 1MHz定时器模式 */  
110.       #define WDT_MDLY_32         WDTPW+WDTTMSEL+WDTCNTCL                          
111.        /* TSMCLK*2POWER15=32ms 复位状态 */  
112.       #define WDT_MDLY_8          WDTPW+WDTTMSEL+WDTCNTCL+WDTIS0                   
113.        /* TSMCLK*2POWER13=8.192ms     " */  
114.       #define WDT_MDLY_0_5        WDTPW+WDTTMSEL+WDTCNTCL+WDTIS1                   
115.        /* TSMCLK*2POWER9=0.512ms   " */  
116.       #define WDT_MDLY_0_064      WDTPW+WDTTMSEL+WDTCNTCL+WDTIS1+WDTIS0            
117.        /* TSMCLK*2POWER6=0.512ms " */  
118.       /* ACLK=32.768KHz 定时器模式*/  
119.       #define WDT_ADLY_1000       WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL                  
120.        /* TACLK*2POWER15=1000ms  " */  
121.       #define WDT_ADLY_250        WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL+WDTIS0           
122.        /* TACLK*2POWER13=250ms   " */  
123.       #define WDT_ADLY_16         WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL+WDTIS1           
124.        /* TACLK*2POWER9=16ms    " */  
125.       #define WDT_ADLY_1_9        WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL+WDTIS1+WDTIS0    
126.        /* TACLK*2POWER6=1.9ms   " */  
127.       /* SMCLK=1MHz看门狗模式 */  
128.       #define WDT_MRST_32         WDTPW+WDTCNTCL                                   
129.        /* TSMCLK*2POWER15=32ms 复位状态  */  
130.       #define WDT_MRST_8          WDTPW+WDTCNTCL+WDTIS0                            
131.        /* TSMCLK*2POWER13=8.192ms   " */  
132.       #define WDT_MRST_0_5        WDTPW+WDTCNTCL+WDTIS1                            
133.        /* TSMCLK*2POWER9=0.512ms  " */  
134.       #define WDT_MRST_0_064      WDTPW+WDTCNTCL+WDTIS1+WDTIS0                     
135.        /* TSMCLK*2POWER6=0.512ms " */  
136.       /* ACLK=32KHz看门狗模式 */  
137.       #define WDT_ARST_1000       WDTPW+WDTCNTCL+WDTSSEL                           
138.        /* TACLK*2POWER15=1000ms  " */  
139.       #define WDT_ARST_250        WDTPW+WDTCNTCL+WDTSSEL+WDTIS0                    
140.        /* TACLK*2POWER13=250ms   " */  
141.       #define WDT_ARST_16         WDTPW+WDTCNTCL+WDTSSEL+WDTIS1                    
142.        /* TACLK*2POWER9=16ms    " */  
143.       #define WDT_ARST_1_9        WDTPW+WDTCNTCL+WDTSSEL+WDTIS1+WDTIS0             
144.        /* TACLK*2POWER6=1.9ms   " */  
145.       MSP430寄存器中文注释---A/D采样寄存器定义  
146.       /************************************************************ 
147.       * ADC12   A/D采样寄存器定义 
148.       ************************************************************/  
149.       /*ADC12转换控制类寄存器*/  
150.       #define ADC12CTL0_          0x0;‘ /* ADC12 Control 0 */  
151.       sfrw    ADC12CTL0         = ADC12CTL0_;  
152.       #define ADC12CTL1_          0x01A2  /* ADC12 Control 1 */  
153.       sfrw    ADC12CTL1         = ADC12CTL1_;  
154.       /*ADC12中断控制类寄存器*/  
155.       #define ADC12IFG_           0x01A4  /* ADC12 Interrupt Flag */  
156.       sfrw    ADC12IFG          = ADC12IFG_;  
157.       #define ADC12IE_            0x01A6  /* ADC12 Interrupt Enable */  
158.       sfrw    ADC12IE           = ADC12IE_;  
159.       #define ADC12IV_            0x01A8  /* ADC12 Interrupt Vector Word */  
160.       sfrw    ADC12IV           = ADC12IV_;  
161.       /*ADC12存贮器类寄存器*/  
162.       #define ADC12MEM_           0x0140  /* ADC12 Conversion Memory */  
163.       #ifndef __IAR_SYSTEMS_ICC  
164.       #define ADC12MEM            ADC12MEM_ /* ADC12 Conversion Memory (for   
165.       assembler) */  
166.       #else  
167.       #define ADC12MEM            ((int*) ADC12MEM_) /* ADC12 Conversion Memory   
168.       (for C) */  
169.       #endif  
170.       #define ADC12MEM0_          ADC12MEM_ /* ADC12 Conversion Memory 0 */  
171.       sfrw    ADC12MEM0         = ADC12MEM0_;  
172.       #define ADC12MEM1_          0x0142  /* ADC12 Conversion Memory 1 */  
173.       sfrw    ADC12MEM1         = ADC12MEM1_;  
174.       #define ADC12MEM2_          0x0144  /* ADC12 Conversion Memory 2 */  
175.       sfrw    ADC12MEM2         = ADC12MEM2_;  
176.       #define ADC12MEM3_          0x0146  /* ADC12 Conversion Memory 3 */  
177.       sfrw    ADC12MEM3         = ADC12MEM3_;  
178.       #define ADC12MEM4_          0x0148  /* ADC12 Conversion Memory 4 */  
179.       sfrw    ADC12MEM4         = ADC12MEM4_;  
180.       #define ADC12MEM5_          0x014A  /* ADC12 Conversion Memory 5 */  
181.       sfrw    ADC12MEM5         = ADC12MEM5_;  
182.       #define ADC12MEM6_          0x014C  /* ADC12 Conversion Memory 6 */  
183.       sfrw    ADC12MEM6         = ADC12MEM6_;  
184.       #define ADC12MEM7_          0x014E  /* ADC12 Conversion Memory 7 */  
185.       sfrw    ADC12MEM7         = ADC12MEM7_;  
186.       #define ADC12MEM8_          0x0150  /* ADC12 Conversion Memory 8 */  
187.       sfrw    ADC12MEM8         = ADC12MEM8_;  
188.       #define ADC12MEM9_          0x0152  /* ADC12 Conversion Memory 9 */  
189.       sfrw    ADC12MEM9         = ADC12MEM9_;  
190.       #define ADC12MEM10_         0x0154  /* ADC12 Conversion Memory 10 */  
191.       sfrw    ADC12MEM10        = ADC12MEM10_;  
192.       #define ADC12MEM11_         0x0156  /* ADC12 Conversion Memory 11 */  
193.       sfrw    ADC12MEM11        = ADC12MEM11_;  
194.       #define ADC12MEM12_         0x0158  /* ADC12 Conversion Memory 12 */  
195.       sfrw    ADC12MEM12        = ADC12MEM12_;  
196.       #define ADC12MEM13_         0x015A  /* ADC12 Conversion Memory 13 */  
197.       sfrw    ADC12MEM13        = ADC12MEM13_;  
198.       #define ADC12MEM14_         0x015C  /* ADC12 Conversion Memory 14 */  
199.       sfrw    ADC12MEM14        = ADC12MEM14_;  
200.       #define ADC12MEM15_         0x015E  /* ADC12 Conversion Memory 15 */  
201.       sfrw    ADC12MEM15        = ADC12MEM15_;  
202.       /*ADC12存贮控制类寄存器*/  
203.       #define ADC12MCTL_          0x0080  /* ADC12 Memory Control */  
204.       #ifndef __IAR_SYSTEMS_ICC  
205.       #define ADC12MCTL           ADC12MCTL_ /* ADC12 Memory Control (for   
206.       assembler) */  
207.       #else  
208.       #define ADC12MCTL           ((char*) ADC12MCTL_) /* ADC12 Memory Control   
209.       (for C) */  
210.       #endif  
211.       #define ADC12MCTL0_         ADC12MCTL_ /* ADC12 Memory Control 0 */  
212.       sfrb    ADC12MCTL0        = ADC12MCTL0_;  
213.       #define ADC12MCTL1_         0x0081  /* ADC12 Memory Control 1 */  
214.       sfrb    ADC12MCTL1        = ADC12MCTL1_;  
215.       #define ADC12MCTL2_         0x0082  /* ADC12 Memory Control 2 */  
216.       sfrb    ADC12MCTL2        = ADC12MCTL2_;  
217.       #define ADC12MCTL3_         0x0083  /* ADC12 Memory Control 3 */  
218.       sfrb    ADC12MCTL3        = ADC12MCTL3_;  
219.       #define ADC12MCTL4_         0x0084  /* ADC12 Memory Control 4 */  
220.       sfrb    ADC12MCTL4        = ADC12MCTL4_;  
221.       #define ADC12MCTL5_         0x0085  /* ADC12 Memory Control 5 */  
222.       sfrb    ADC12MCTL5        = ADC12MCTL5_;  
223.       #define ADC12MCTL6_         0x0086  /* ADC12 Memory Control 6 */  
224.       sfrb    ADC12MCTL6        = ADC12MCTL6_;  
225.       #define ADC12MCTL7_         0x0087  /* ADC12 Memory Control 7 */  
226.       sfrb    ADC12MCTL7        = ADC12MCTL7_;  
227.       #define ADC12MCTL8_         0x0088  /* ADC12 Memory Control 8 */  
228.       sfrb    ADC12MCTL8        = ADC12MCTL8_;  
229.       #define ADC12MCTL9_         0x0089  /* ADC12 Memory Control 9 */  
230.       sfrb    ADC12MCTL9        = ADC12MCTL9_;  
231.       #define ADC12MCTL10_        0x008A  /* ADC12 Memory Control 10 */  
232.       sfrb    ADC12MCTL10       = ADC12MCTL10_;  
233.       #define ADC12MCTL11_        0x008B  /* ADC12 Memory Control 11 */  
234.       sfrb    ADC12MCTL11       = ADC12MCTL11_;  
235.       #define ADC12MCTL12_        0x008C  /* ADC12 Memory Control 12 */  
236.       sfrb    ADC12MCTL12       = ADC12MCTL12_;  
237.       #define ADC12MCTL13_        0x008D  /* ADC12 Memory Control 13 */  
238.       sfrb    ADC12MCTL13       = ADC12MCTL13_;  
239.       #define ADC12MCTL14_        0x008E  /* ADC12 Memory Control 14 */  
240.       sfrb    ADC12MCTL14       = ADC12MCTL14_;  
241.       #define ADC12MCTL15_        0x008F  /* ADC12 Memory Control 15 */  
242.       sfrb    ADC12MCTL15       = ADC12MCTL15_;  
243.       /* ADC12CTL0 内8位控制寄存器位*/  
244.       #define ADC12SC             0x001         /*采样/转换控制位*/     
245.       #define ENC                 0x002         /* 转换允许位*/  
246.       #define ADC12TOVIE          0x004         /*转换时间溢出中断允许位*/  
247.       #define ADC12OVIE           0x008         /*溢出中断允许位*/   
248.       #define ADC12ON             0x010         /*ADC12内核控制位*/  
249.       #define REFON               0x020         /*参考电压控制位*/  
250.       #define REF2_5V             0x040         /*内部参考电压的电压值选择位 ‘0‘为1.5V;   
251.       ‘1‘为2.5V*/  
252.       #define MSH                 0x080         /*多次采样/转换位*/  
253.       #define MSC                 0x080         /*多次采样/转换位*/  
254.       /*SHT0 采样保持定时器0 控制ADC12的结果存贮器MEM0~MEM7的采样周期*/  
255.       #define SHT0_0               0*0x100       /*采样周期=TADC12CLK*4 */  
256.       #define SHT0_1               1*0x100       /*采样周期=TADC12CLK*8 */  
257.       #define SHT0_2               2*0x100       /*采样周期=TADC12CLK*16 */  
258.       #define SHT0_3               3*0x100       /*采样周期=TADC12CLK*32 */  
259.       #define SHT0_4               4*0x100       /*采样周期=TADC12CLK*64 */  
260.       #define SHT0_5               5*0x100       /*采样周期=TADC12CLK*96 */  
261.       #define SHT0_6               6*0x100       /*采样周期=TADC12CLK*128 */  
262.       #define SHT0_7               7*0x100       /*采样周期=TADC12CLK*192 */  
263.       #define SHT0_8               8*0x100       /*采样周期=TADC12CLK*256 */  
264.       #define SHT0_9               9*0x100       /*采样周期=TADC12CLK*384 */  
265.       #define SHT0_10             10*0x100       /*采样周期=TADC12CLK*512 */    
266.       #define SHT0_11             11*0x100       /*采样周期=TADC12CLK*768 */  
267.       #define SHT0_12             12*0x100       /*采样周期=TADC12CLK*1024 */  
268.       #define SHT0_13             13*0x100       /*采样周期=TADC12CLK*1024 */   
269.       #define SHT0_14             14*0x100       /*采样周期=TADC12CLK*1024 */   
270.       #define SHT0_15             15*0x100       /*采样周期=TADC12CLK*1024 */  
271.       /*SHT1 采样保持定时器1 控制ADC12的结果存贮器MEM8~MEM15的采样周期*/  
272.       #define SHT1_0               0*0x100       /*采样周期=TADC12CLK*4 */  
273.       #define SHT1_1               1*0x100       /*采样周期=TADC12CLK*8 */  
274.       #define SHT1_2               2*0x100       /*采样周期=TADC12CLK*16 */  
275.       #define SHT1_3               3*0x100       /*采样周期=TADC12CLK*32 */  
276.       #define SHT1_4               4*0x100       /*采样周期=TADC12CLK*64 */  
277.       #define SHT1_5               5*0x100       /*采样周期=TADC12CLK*96 */  
278.       #define SHT1_6               6*0x100       /*采样周期=TADC12CLK*128 */  
279.       #define SHT1_7               7*0x100       /*采样周期=TADC12CLK*192 */  
280.       #define SHT1_8               8*0x100       /*采样周期=TADC12CLK*256 */  
281.       #define SHT1_9               9*0x100       /*采样周期=TADC12CLK*384 */  
282.       #define SHT1_10             10*0x100       /*采样周期=TADC12CLK*512 */    
283.       #define SHT1_11             11*0x100       /*采样周期=TADC12CLK*768 */  
284.       #define SHT1_12             12*0x100       /*采样周期=TADC12CLK*1024 */  
285.       #define SHT1_13             13*0x100       /*采样周期=TADC12CLK*1024 */   
286.       #define SHT1_14             14*0x100       /*采样周期=TADC12CLK*1024 */   
287.       #define SHT1_15             15*0x100       /*采样周期=TADC12CLK*1024 */  
288.   
289.       /* ADC12CTL1 内8位控制寄存器位*/  
290.       #define ADC12BUSY           0x0001         /*ADC12忙标志位*/  
291.       #define CONSEQ_0             0*2           /*单通道单次转换*/   
292.       #define CONSEQ_1             1*2           /*序列通道单次转换*/  
293.       #define CONSEQ_2             2*2           /*单通道多次转换*/  
294.       #define CONSEQ_3             3*2           /*序列通道多次转换*/  
295.       #define ADC12SSEL_0          0*8           /*ADC12内部时钟源*/  
296.       #define ADC12SSEL_1          1*8           /*ACLK*/  
297.       #define ADC12SSEL_2          2*8           /*MCLK*/  
298.       #define ADC12SSEL_3          3*8           /*SCLK*/  
299.       #define ADC12DIV_0           0*0x20        /*1分频*/  
300.       #define ADC12DIV_1           1*0x20        /*2分频*/  
301.       #define ADC12DIV_2           2*0x20        /*3分频*/  
302.       #define ADC12DIV_3           3*0x20        /*4分频*/   
303.       #define ADC12DIV_4           4*0x20        /*5分频*/   
304.       #define ADC12DIV_5           5*0x20        /*6分频*/  
305.       #define ADC12DIV_6           6*0x20        /*7分频*/  
306.       #define ADC12DIV_7           7*0x20        /*8分频*/  
307.       #define ISSH                 0x0100        /*采样输入信号反向与否控制位*/  
308.       #define SHP                  0x0200        /*采样信号(SAMPCON)选择控制位*/  
309.       #define SHS_0                0*0x400       /*采样信号输入源选择控制位 ADC12SC*/   
310.       #define SHS_1                1*0x400       /*采样信号输入源选择控制位 TIMER_A.OUT1*/  
311.       #define SHS_2                2*0x400       /*采样信号输入源选择控制位 TIMER_B.OUT0*/  
312.       #define SHS_3                3*0x400       /*采样信号输入源选择控制位 TIMER_B.OUT1*/  
313.   
314.      /*转换存贮器地址定义位*/  
315.       #define CSTARTADD_0          0*0x1000      /*选择MEM0首地址*/  
316.       #define CSTARTADD_1          1*0x1000      /*选择MEM1首地址*/   
317.       #define CSTARTADD_2          2*0x1000      /*选择MEM2首地址*/  
318.       #define CSTARTADD_3          3*0x1000      /*选择MEM3首地址*/  
319.       #define CSTARTADD_4          4*0x1000      /*选择MEM4首地址*/  
320.       #define CSTARTADD_5          5*0x1000      /*选择MEM5首地址*/  
321.       #define CSTARTADD_6          6*0x1000      /*选择MEM6首地址*/  
322.       #define CSTARTADD_7          7*0x1000      /*选择MEM7首地址*/   
323.       #define CSTARTADD_8          8*0x1000      /*选择MEM8首地址*/  
324.       #define CSTARTADD_9          9*0x1000      /*选择MEM9首地址*/  
325.       #define CSTARTADD_10        10*0x1000      /*选择MEM10首地址*/  
326.       #define CSTARTADD_11        11*0x1000      /*选择MEM11首地址*/  
327.       #define CSTARTADD_12        12*0x1000      /*选择MEM12首地址*/  
328.       #define CSTARTADD_13        13*0x1000      /*选择MEM13首地址*/        
329.       #define CSTARTADD_14        14*0x1000      /*选择MEM14首地址*/      
330.       #define CSTARTADD_15        15*0x1000      /*选择MEM15首地址*/  
331.           
332.       /* ADC12MCTLx */  
333.       #define INCH_0               0                 /*选择模拟量通道0 A0 */  
334.       #define INCH_1               1                 /*选择模拟量通道0 A1*/  
335.       #define INCH_2               2                 /*选择模拟量通道0 A2*/  
336.       #define INCH_3               3                 /*选择模拟量通道0 A3*/  
337.       #define INCH_4               4                 /*选择模拟量通道0 A4*/  
338.       #define INCH_5               5                 /*选择模拟量通道0 A5*/  
339.       #define INCH_6               6                 /*选择模拟量通道0 A6*/  
340.       #define INCH_7               7                 /*选择模拟量通道0 A7*/  
341.       #define INCH_8               8                 /*VEREF+*/  
342.       #define INCH_9               9                 /*VEREF-*/  
343.       #define INCH_10             10                 /*片内温度传感器的输出*/  
344.       #define INCH_11             11                 /*(AVCC-AVSS)/2*/  
345.       #define INCH_12             12                 /*(AVCC-AVSS)/2*/  
346.       #define INCH_13             13                 /*(AVCC-AVSS)/2*/  
347.       #define INCH_14             14                 /*(AVCC-AVSS)/2*/  
348.       #define INCH_15             15                 /*(AVCC-AVSS)/2*/  
349.       /*参考电压源选择位*/  
350.       #define SREF_0               0*0x10            /*VR+ = AVCC; VR- = AVSS*/  
351.       #define SREF_1               1*0x10            /*VR+ = VREF+; VR- = AVSS*/  
352.       #define SREF_2               2*0x10            /*VR+ = VEREF+; VR- = AVSS*/  
353.       #define SREF_3               3*0x10            /*VR+ = VEREF+; VR- = AVSS*/  
354.       #define SREF_4               4*0x10            /*VR+ = AVCC; VR- = VREF-*/  
355.       #define SREF_5               5*0x10            /*VR+ = VREF+; VR- = VREF-*/  
356.       #define SREF_6               6*0x10            /*VR+ = VEREF+; VR- =   
357.       VREF-*/  
358.       #define SREF_7               7*0x10            /*VR+ = VEREF+; VR- =   
359.       VREF-*/  
360.       #define EOS                 0x80               /*序列结束选择位*/  
361.       MSP430寄存器中文注释----串口寄存器  
362.       /************************************************************ 
363.       * USART   串口寄存器"UCTL","UTCTL","URCTL"定义的各个位可串口1 串口2公用 
364.       ************************************************************/  
365.       /* UCTL  串口控制寄存器*/    
366.       #define PENA                0x80        /*校验允许位*/  
367.       #define PEV                 0x40        /*偶校验   为0时为奇校验*/  
368.       #define SPB                 0x20        /*停止位为2 为0时停止位为1*/  
369.       #define CHAR                0x10        /*数据位为8位为0时数据位为7位*/  
370.       #define LISTEN              0x08        /*自环模式(发数据同时在把发的数据接收回来)*/  
371.       #define SYNC                0x04        /*同步模式  为0异步模式*/  
372.       #define MM                  0x02        /*为1时地址位多机协议(异步)   
373.       主机模式(同步);为0时线路空闲多机协议(异步) 从机模式(同步)*/  
374.       #define SWRST               0x01        /*控制位*/  
375.       /* UTCTL 串口发送控制寄存器*/  
376.       #define CKPH                0x80        /*时钟相位控制位(只同步方式用)为1时时钟UCLK延时半个周期*/   
377.            
378.       #define CKPL                0x40        /*时钟极性控制位 为1时异步与UCLK相反;同步下降延有效*/  
379.       #define SSEL1               0x20        /*时钟源选择位:与SSEL0组合为0,1,2,3四种方式*/  
380.       #define SSEL0               0x10          
381.       /*"0"选择外部时钟,"1"选择辅助时钟,"2","3"选择系统子时钟 */  
382.       #define URXSE               0x08        /*接收触发延控制位(只在异步方式下用)*/  
383.       #define TXWAKE              0x04        /*多处理器通信传送控制位(只在异步方式下用)*/  
384.       #define STC                 0x02        /*外部引脚STE选择位为0时为4线模式 为1时为3线模式*/  
385.       #define TXEPT               0x01        /*发送器空标志*/  
386.       /* URCTL 串口接收控制寄存器                同步模式下只用两位:FE和OE*/  
387.       #define FE                  0x80         /*帧错标志*/             
388.       #define PE                  0x40         /*校验错标志位*/  
389.       #define OE                  0x20         /*溢出标志位*/  
390.       #define BRK                 0x10         /*打断检测位*/  
391.       #define URXEIE              0x08         /*接收出错中断允许位*/  
392.       #define URXWIE              0x04         /*接收唤醒中断允许位*/  
393.       #define RXWAKE              0x02         /*接收唤醒检测位*/  
394.       #define RXERR               0x01         /*接收错误标志位*/  
395.       /************************************************************ 
396.       * USART 0           串口0寄存器定义 
397.       ************************************************************/  
398.       #define U0CTL_              0x0070  /* UART 0 Control */  
399.       sfrb    U0CTL             = U0CTL_;  
400.       #define U0TCTL_             0x0071  /* UART 0 Transmit Control */  
401.       sfrb    U0TCTL            = U0TCTL_;  
402.       #define U0RCTL_             0x0072  /* UART 0 Receive Control */  
403.       sfrb    U0RCTL            = U0RCTL_;  
404.       #define U0MCTL_             0x0073  /* UART 0 Modulation Control */  
405.       sfrb    U0MCTL            = U0MCTL_;  
406.       #define U0BR0_              0x0074  /* UART 0 Baud Rate 0 */  
407.       sfrb    U0BR0             = U0BR0_;  
408.       #define U0BR1_              0x0075  /* UART 0 Baud Rate 1 */  
409.       sfrb    U0BR1             = U0BR1_;  
410.       #define U0RXBUF_            0x0076  /* UART 0 Receive Buffer */  
411.       const sfrb U0RXBUF        = U0RXBUF_;  
412.       #define U0TXBUF_            0x0077  /* UART 0 Transmit Buffer */  
413.       sfrb    U0TXBUF           = U0TXBUF_;  
414.       /* Alternate register names */  
415.       #define UCTL0_              0x0070  /* UART 0 Control */  
416.       sfrb    UCTL0             = UCTL0_;  
417.       #define UTCTL0_             0x0071  /* UART 0 Transmit Control */  
418.       sfrb    UTCTL0            = UTCTL0_;  
419.       #define URCTL0_             0x0072  /* UART 0 Receive Control */  
420.       sfrb    URCTL0            = URCTL0_;  
421.       #define UMCTL0_             0x0073  /* UART 0 Modulation Control */  
422.       sfrb    UMCTL0            = UMCTL0_;  
423.       #define UBR00_              0x0074  /* UART 0 Baud Rate 0 */  
424.       sfrb    UBR00             = UBR00_;  
425.       #define UBR10_              0x0075  /* UART 0 Baud Rate 1 */  
426.       sfrb    UBR10             = UBR10_;  
427.       #define RXBUF0_             0x0076  /* UART 0 Receive Buffer */  
428.       const sfrb RXBUF0         = RXBUF0_;  
429.       #define TXBUF0_             0x0077  /* UART 0 Transmit Buffer */  
430.       sfrb    TXBUF0            = TXBUF0_;  
431.       #define UCTL_0_             0x0070  /* UART 0 Control */  
432.       sfrb    UCTL_0            = UCTL_0_;  
433.       #define UTCTL_0_            0x0071  /* UART 0 Transmit Control */  
434.       sfrb    UTCTL_0           = UTCTL_0_;  
435.       #define URCTL_0_            0x0072  /* UART 0 Receive Control */  
436.       sfrb    URCTL_0           = URCTL_0_;  
437.       #define UMCTL_0_            0x0073  /* UART 0 Modulation Control */  
438.       sfrb    UMCTL_0           = UMCTL_0_;  
439.       #define UBR0_0_             0x0074  /* UART 0 Baud Rate 0 */  
440.       sfrb    UBR0_0            = UBR0_0_;  
441.       #define UBR1_0_             0x0075  /* UART 0 Baud Rate 1 */  
442.       sfrb    UBR1_0            = UBR1_0_;  
443.       #define RXBUF_0_            0x0076  /* UART 0 Receive Buffer */  
444.       const sfrb RXBUF_0        = RXBUF_0_;  
445.       #define TXBUF_0_            0x0077  /* UART 0 Transmit Buffer */  
446.       sfrb    TXBUF_0           = TXBUF_0_;  
447.       /************************************************************ 
448.       * USART 1         串口1寄存器定义 
449.       ************************************************************/  
450.       #define U1CTL_              0x0078  /* UART 1 Control */  
451.       sfrb    U1CTL             = U1CTL_;  
452.       #define U1TCTL_             0x0079  /* UART 1 Transmit Control */  
453.       sfrb    U1TCTL            = U1TCTL_;  
454.       #define U1RCTL_             0x007A  /* UART 1 Receive Control */  
455.       sfrb    U1RCTL            = U1RCTL_;  
456.       #define U1MCTL_             0x007B  /* UART 1 Modulation Control */  
457.       sfrb    U1MCTL            = U1MCTL_;  
458.       #define U1BR0_              0x007C  /* UART 1 Baud Rate 0 */  
459.       sfrb    U1BR0             = U1BR0_;  
460.       #define U1BR1_              0x007D  /* UART 1 Baud Rate 1 */  
461.       sfrb    U1BR1             = U1BR1_;  
462.       #define U1RXBUF_            0x007E  /* UART 1 Receive Buffer */  
463.       const sfrb U1RXBUF        = U1RXBUF_;  
464.       #define U1TXBUF_            0x007F  /* UART 1 Transmit Buffer */  
465.       sfrb    U1TXBUF           = U1TXBUF_;  
466.       #define UCTL1_              0x0078  /* UART 1 Control */  
467.       sfrb    UCTL1             = UCTL1_;  
468.       #define UTCTL1_             0x0079  /* UART 1 Transmit Control */  
469.       sfrb    UTCTL1            = UTCTL1_;  
470.       #define URCTL1_             0x007A  /* UART 1 Receive Control */  
471.       sfrb    URCTL1            = URCTL1_;  
472.       #define UMCTL1_             0x007B  /* UART 1 Modulation Control */  
473.       sfrb    UMCTL1            = UMCTL1_;  
474.       #define UBR01_               0x007C  /* UART 1 Baud Rate 0 */  
475.       sfrb    UBR01             = UBR01_;  
476.       #define UBR11_              0x007D  /* UART 1 Baud Rate 1 */  
477.       sfrb    UBR11             = UBR11_;  
478.       #define RXBUF1_             0x007E  /* UART 1 Receive Buffer */  
479.       const sfrb RXBUF1         = RXBUF1_;  
480.       #define TXBUF1_             0x007F  /* UART 1 Transmit Buffer */  
481.       sfrb    TXBUF1            = TXBUF1_;  
482.       #define UCTL_1_             0x0078  /* UART 1 Control */  
483.       sfrb    UCTL_1            = UCTL_1_;  
484.       #define UTCTL_1_            0x0079  /* UART 1 Transmit Control */  
485.       sfrb    UTCTL_1           = UTCTL_1_;  
486.       #define URCTL_1_            0x007A  /* UART 1 Receive Control */  
487.       sfrb    URCTL_1           = URCTL_1_;  
488.       #define UMCTL_1_            0x007B  /* UART 1 Modulation Control */  
489.       sfrb    UMCTL_1           = UMCTL_1_;  
490.       #define UBR0_1_             0x007C  /* UART 1 Baud Rate 0 */  
491.       sfrb    UBR0_1            = UBR0_1_;  
492.       #define UBR1_1_             0x007D  /* UART 1 Baud Rate 1 */  
493.       sfrb    UBR1_1            = UBR1_1_;  
494.       #define RXBUF_1_            0x007E  /* UART 1 Receive Buffer */  
495.       const sfrb RXBUF_1        = RXBUF_1_;  
496.       #define TXBUF_1_            0x007F  /* UART 1 Transmit Buffer */  
497.       sfrb    TXBUF_1           = TXBUF_1_;  

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原文地址：http://www.cnblogs.com/CenTyger/p/5686664.html