7段数码管显示驱动代码

 module scan_led(
    input   wire  clk_1k,
    input   wire  rst_n,
    input   wire  [31:0] d,
    output  wire  [2:0] dig,//sel 
    output  wire  [7:0] seg
  );
  reg [7:0] seg_r;
  reg [2:0] dig_r;
  reg [3:0] disp_dat;
  reg [2:0] count;
  assign dig =dig_r;
  assign seg =sig_r;
  // 时钟不能直接接全局时钟，这里的时钟驱动给的是1k的
  always @(posedge clk_1k or negedge rst_n)
  begin 
   if(!rst_n)
     count <=3‘b000;
   else if(count == 3‘d5)
     count <=3‘b000;
   else 
     count <=count +1‘b1;
  end 
 always @(posedge clk_1k or negedge rst_n)
  begin
   case (count)
       3‘d0:disp_dat = d[31:28];  
       3‘d1:disp_dat = d[27:24];  
       3‘d2:disp_dat = d[23:20];  
       3‘d3:disp_dat = d[19:16];  
       3‘d4:disp_dat = d[15:12];  
       3‘d5:disp_dat = d[11:8];      
       3‘d6:disp_dat = d[7:4];        
       3‘d7:disp_dat = d[3:0];    
   endcase
   case (count)
        3‘d0:dig_r = 3‘d0;    
        3‘d1:dig_r = 3‘d1;    
        3‘d2:dig_r = 3‘d2;    
        3‘d3:dig_r = 3‘d3;    
        3‘d4:dig_r = 3‘d4;    
        3‘d5:dig_r = 3‘d5;    
        3‘d6:dig_r = 3‘d6;    
        3‘d7:dig_r = 3‘d7;     
    endcase
  end 
always @(disp_dat)
begin
  case(disp_dat)
       4‘h0:seg_r = 8‘hc0;
       4‘h1:seg_r = 8‘hf9;
       4‘h2:seg_r = 8‘ha4;
       4‘h3:seg_r = 8‘hb0;
       4‘h4:seg_r = 8‘h99;
       4‘h5:seg_r = 8‘h92;
       4‘h6:seg_r = 8‘h82;
       4‘h7:seg_r = 8‘hf8;
       4‘h8:seg_r = 8‘h80;
       4‘h9:seg_r = 8‘h90;
       4‘ha:seg_r = 8‘h88;
       4‘hb:seg_r = 8‘h83;
       4‘hc:seg_r = 8‘hc6;
       4‘hd:seg_r = 8‘ha1;
       4‘he:seg_r = 8‘h86;
       4‘hf:seg_r = 8‘h8e;  
   endcase  
end 
endmodule

module display1 (clk, rst_n , sel, seg);    
    input clk;
    input rst_n;
//两个输出，位选sel和段选seg
    output reg [2:0] sel;
    output reg [7:0] seg;
//数码管扫描需要一个慢时钟 clk_slow，而产生慢时钟则需要一个计数器 cnt
    reg [15:0] cnt;
    reg clk_slow;
//这个always块用来产生慢时钟clk_slow
    always @ (posedge clk)
    begin 
        if(!rst_n)
        begin

            cnt <= 0;
            clk_slow <= 1; //复位时clk_slow静止不动
        end
        else
        begin
            cnt <= cnt + 1; //复位结束后cnt开始计数
            clk_slow <= cnt[12];  //扫描没有必要非得是60Hz整，大于60Hz即可
        end
    end
//下面这个always块用于扫描数码管，也就是sel循环地变化，
//时钟每一次上升沿sel变化一次，所以在括号里写上时钟上升沿作为触发条件
    always @ (posedge clk_slow or negedge rst_n)
    begin
        if(!rst_n)
        begin
            sel <= 0;    //复位时sel静止
        end
        else
        begin
            sel <= sel + 1; //复位后sel开始扫描
            if(sel >= 5)
                sel <= 0;    //因为只有6个数码管，所以让sel在0-5之间循环
        end
    end

    always @ (*)
    begin
        if(!rst_n)
            seg <= 8‘b11111111;  //按下复位键时让数码管熄灭，共阳极数码管0亮1灭
        else
        begin
            case(sel)
            0: seg <= 8‘b11111001;   //右起第1个数码管上显示1
            1: seg <= 8‘b10100100;   //右起第2个数码管上显示2
            2: seg <= 8‘b10110000;
            3: seg <= 8‘b10011001;
            4: seg <= 8‘b10010010;
            5: seg <= 8‘b10000010;   //右起第6个数码管上显示6
            default: seg <= 8‘b11111111;
            endcase
        end
    end
endmodule