.text
.global _start
_start:
    b reset
    ldr pc,_undefined_instruction
    ldr pc,_software_interrupt
    ldr pc,_prefetch_abort
    ldr pc,_data_abort
    ldr pc,_not_used
    ldr pc,_irq
    ldr pc,_fiq

_undefined_instruction: .word undefined_instruction
_software_interrupt: .word software_interrupt
_prefetch_abort: .word prefetch_abort
_data_abort: .word data_abort
_not_used: .word not_used
_irq: .word irq
_fiq: .word fiq


undefined_instruction:
    nop

software_interrupt:
    nop

prefetch_abort:
    nop

data_abort:
    nop

not_used:
    nop

irq:
    nop

fiq:
    nop

reset:
    bl set_svc
    bl disable_watchdog
    bl disable_interrupt
    bl disable_mmu

set_svc:
    mrs r0,cpsr
    bic r0,r0,#0x1f
    orr r0,r0,#0xd3
    msr cpsr,r0
    mov pc,lr

#define pWACON    0x7e004000
disable_watchdog:
    ldr r0,=pWACON
    mov r1,#0x0
    str r1,[r0]
    mov pc,lr

disable_interrupt:
    mvn r1,#0x0
    ldr r0,=0x71200014
    str r1,[r0]

    ldr r0,=0x71300014
    str r1,[r0]

    mov pc,lr

disable_mmu:
    mcr p15,0,r0,c7,c7,0
    
    mrc p15,0,r0,c1,c0,0
    bic r0,r0,#0x00000005
    mcr p15,0,r0,c1,c0,0

    mov pc,lr

OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
    . = 0X5000000;

    . = ALIGN(4);
    .text :
    {
        start.o(.text)
        *(.text)
    }

    . = ALIGN(4);
    .data :
    {
        *(.data)
    }

    . = ALIGN(4);
    bss_start = .;
    .bss :
    {
        *(.bss)
    }
    bss_end = .;
}

all : start.o
    arm-linux-ld -Txboot.lds -o xboot.elf $^
    arm-linux-objcopy -O binary xboot.elf xboot.bin

%.o : %.c
    arm-linux-gcc -g -c $^

%.o : %.S
    arm-linux-gcc -g -c $^

.PHONY : clean
clean:
        rm *.o *.bin *.elf