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1 本章构建完整的算术逻辑单元ALU。
2 有符号的二进制数
1) 补码：x的补码=2的n次方-x，即反码+1
2) 减法可以看成x-y=x+(-y)
3 加法器
1) HalfAdder 半加器
/**
* Computes the sum of two bits.
*/
CHIP HalfAdder {
IN a, b; // 1-bit inputs
OUT sum, // Right bit of a + b
carry; // Left bit of a + b
PARTS:
Xor(a=a,b=b,out=sum);
And(a=a,b=b,out=carry);
}
2) FullAdder 全加器
/**
* Computes the sum of three bits.
*/
CHIP FullAdder {
IN a, b, c; // 1-bit inputs
OUT sum, // Right bit of a + b + c
carry; // Left bit of a + b + c
PARTS:
HalfAdder(a=a,b=b,sum=s1,carry=c1);
HalfAdder(a=s1,b=c,sum=sum,carry=c2);
Or(a=c1,b=c2,out=carry);
}
3) Add16 加法器
/**
* Adds two 16-bit values.
* The most significant carry bit is ignored.
*/
CHIP Add16 {
IN a[16], b[16];
OUT out[16];
PARTS:
HalfAdder(a=a[0],b=b[0],sum=out[0],carry=c1);
FullAdder(a=a[1],b=b[1],c=c1,sum=out[1],carry=c2);
FullAdder(a=a[2],b=b[2],c=c2,sum=out[2],carry=c3);
FullAdder(a=a[3],b=b[3],c=c3,sum=out[3],carry=c4);
FullAdder(a=a[4],b=b[4],c=c4,sum=out[4],carry=c5);
FullAdder(a=a[5],b=b[5],c=c5,sum=out[5],carry=c6);
FullAdder(a=a[6],b=b[6],c=c6,sum=out[6],carry=c7);
FullAdder(a=a[7],b=b[7],c=c7,sum=out[7],carry=c8);
FullAdder(a=a[8],b=b[8],c=c8,sum=out[8],carry=c9);
FullAdder(a=a[9],b=b[9],c=c9,sum=out[9],carry=c10);
FullAdder(a=a[10],b=b[10],c=c10,sum=out[10],carry=c11);
FullAdder(a=a[11],b=b[11],c=c11,sum=out[11],carry=c12);
FullAdder(a=a[12],b=b[12],c=c12,sum=out[12],carry=c13);
FullAdder(a=a[13],b=b[13],c=c13,sum=out[13],carry=c14);
FullAdder(a=a[14],b=b[14],c=c14,sum=out[14],carry=c15);
FullAdder(a=a[15],b=b[15],c=c15,sum=out[15],carry=c16);
}
4) Inc16 增量器
/**
* 16-bit incrementer:
* out = in + 1 (arithmetic addition)
*/
CHIP Inc16 {
IN in[16];
OUT out[16];
PARTS:
Add16(a=in,b[1..15]=false,b[0]=true,out=out);
}
4 算术逻辑单元ALU
1) ALU
/**
* The ALU (Arithmetic Logic Unit).
* Computes one of the following functions:
* x+y, x-y, y-x, 0, 1, -1, x, y, -x, -y, !x, !y,
* x+1, y+1, x-1, y-1, x&y, x|y on two 16-bit inputs,
* according to 6 input bits denoted zx,nx,zy,ny,f,no.
* In addition, the ALU computes two 1-bit outputs:
* if the ALU output == 0, zr is set to 1; otherwise zr is set to 0;
* if the ALU output < 0, ng is set to 1; otherwise ng is set to 0.
*/
// Implementation: the ALU logic manipulates the x and y inputs
// and operates on the resulting values, as follows:
// if (zx == 1) set x = 0 // 16-bit constant
// if (nx == 1) set x = !x // bitwise not
// if (zy == 1) set y = 0 // 16-bit constant
// if (ny == 1) set y = !y // bitwise not
// if (f == 1) set out = x + y // integer 2‘s complement addition
// if (f == 0) set out = x & y // bitwise and
// if (no == 1) set out = !out // bitwise not
// if (out == 0) set zr = 1
// if (out < 0) set ng = 1
CHIP ALU {
IN
x[16], y[16], // 16-bit inputs
zx, // zero the x input?
nx, // negate the x input?
zy, // zero the y input?
ny, // negate the y input?
f, // compute out = x + y (if 1) or x & y (if 0)
no; // negate the out output?
OUT
out[16], // 16-bit output
zr, // 1 if (out == 0), 0 otherwise
ng; // 1 if (out < 0), 0 otherwise
PARTS:
Mux16(a=x,b[0..15]=false,sel=zx,out=x1);
Not16(in=x1,out=nx1);
Mux16(a=x1,b=nx1,sel=nx,out=x2);
Mux16(a=y,b[0..15]=false,sel=zy,out=y1);
Not16(in=y1,out=ny1);
Mux16(a=y1,b=ny1,sel=ny,out=y2);
Add16(a=x2,b=y2,out=o1);
And16(a=x2,b=y2,out=o2);
Mux16(a=o2,b=o1,sel=f,out=o3);
Not16(in=o3,out=no3);
Mux16(a=o3,b=no3,sel=no,out=o4);
And16(a[0..15]=true,b=o4,out=out);
Or16Way(in=o4,out=o5);
Not(in=o5,out=zr);
And16(a=o4,b[0..14]=false,b[15]=true,out=ng1);
Or16Way(in=ng1,out=ng);
}
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原文地址：http://www.cnblogs.com/way19/p/5937086.html
