标签：short lead proc try ges row using deb sof
High capacity, high-speed, multi-application powerhouse for simulation and emulation of SoC designs
The Veloce2 emulator accelerates block and full SoC RTL simulations during all phases of the design process. It enables pre-silicon testing and debug at hardware speeds, using real-world data, while both hardware and software designs are still fluid.
With a proven hardware architecture that delivers industry-leading capacity and performance, an innovative operating system that supports multiple users and projects around the world, and a growing battery of specialized applications, Veloce2 significantly shortens verification of the largest hardware and software systems in their entirety.
标签：short lead proc try ges row using deb sof
原文地址：http://www.cnblogs.com/YINBin/p/6014391.html
