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S3C6410X supports 32-bit physical address field and that address field can be seperated into two parts, one part
is for memory, the other part is for pheriperal.
Main memory is accessed via SPINE bus, and its address range is from 0x0000_0000 to 0x6FFF_FFFF. This
main memory part is seperated into four areas, boot image area, internal memory area, static memory area, and
dynamic memory area.
Address range of boot image area is from 0x0000_0000 to 0x07FF_FFFF, but there is no real mapped-memory.
Boot image area has mirrored image which points a partial region of internal memory area or static memory area.
Start address of boot image is fixed to 0x0000_0000.
Internal memory area is used to access internal ROM and internal SRAM for boot loader, which is also called
Steppingstone. Start address for each internal memory is fixed. Address range of internal ROM is from
0x0800_0000 to 0x0BFF_FFFF, but real storage is only 32KB. This region is read-only, and can be mapped to
boot image area when internal ROM booting is selected. Address range of internal SRAM is from 0x0C00_0000 to
0x0FFF_FFFF, but real storage is only 4KB.
Address range of static memory area is from 0x1000_0000 to 0x3FFF_FFFF. SROM, SRAM, NOR Flash,
asyncronous NOR interface device, OneNAND Flash, and Steppingstone can be accessed by this address area.
Each area stands for a chip select, for example, address range from 0x1000_0000 to 0x17FF_FFFF stands for
Xm0CSn[0]. Start address for each chip select is fixed. NAND Flash and CF/ATA cannot be accessed via static
memory area, so if any of Xm0CSn[5:2] is mapped to NFCON or CFCON, related address region should not be
accessed. One exception is that if Xm0CSn[2] is used for NAND Flash, Steppingstone is mirrored to address
region from 0x2000_0000 to 27FF_FFFF.
Address range of dynamic memory area is from 0x4000_0000 to 0x6FFF_FFFF. DMC1 has right to use address
range from 0x5000_0000 to 0x6FFF_FFFF. Start address for each chip select is configurable.
S3C6410跟S3C2440不 同，S3C6410支持32位物理地址空间并将该地址空间分为2个部分，一部分是“存储空间”，另一部分是“外设空间”。其中主存储空间通过SPINE总 线访问，其地址空间为0×0000,0000~0x6FFF,FFFF，主存储空间又分为4个区域——引导镜像区(boot image area)，内部存储区(internal memory area)，静态存储区(static memory area)和动态存储区(dynamic
memory area)。
引导镜像区(boot image area)的地址空间为0×0000,0000~0x07FF,FFFF，但是没有实际的内存映射，引导镜像区映射到内部存储区或者静态存储区的部分区域，并且起始地址固定为0×0000,0000。
内部存储区供boot loader访问内部ROM(internal ROM)和内部SRAM(internal SRAM)，也称为Steppingstone。每个内部存储器的起始地址都是固定的。内部ROM的地址空间为 0×0800,0000~0x0BFF,FFFF，但是实际的存储空间只有32KB，这一区域是只读的，且当启动方式选择为内部ROM启动时，该区域应该 映射到引导镜像区(boot image area)。SRAM的地址空间为0x0C00,0000~0x0FFF,FFFF，但是实际的存储空间只有4KB。
静态存储区的地址空间为0×1000,0000~0x3FFF,FFFF，通过这个区 域可以访问SROM，SRAM，NOR Flash，异步NOR接口设备，OneNand Flash和Steppingstone。每个区域对应一个片选，例如，地址空间0×1000,0000~0x17FF,FFFF对应 Xm0CSn[0]。每个片选的起始地址是确定的。Nand flash和CF/ATA不能通过静态存储区访问，所以如果Xm0CSn[5:2]对应的任意区域映射到NFCON或CFCON都导致其对应区域的地址空 间无法访问。一个特例是当Xm0CSn[2]对应的区域用于NAND
Flash时Steppingstone映射到地址空间0×2000,0000~0x27FF,FFFF。
动态存储区的地址空间为0×4000,0000~0x6FFF,FFFF，DMC1有权使用0×5000,0000~0x6FFF,FFFF的地址空间。每个片选的起始地址是可以配置的。
外设空间通过PERI总线访问，并其地址空间为0×7000,0000~0x7FFF,FFFF。所有的特殊功能寄存器都可以通过这个区域访问。如果数据来自NFCON或CFCON，这些数据也通过PERI总线访问。
标签：pch uil sam tab brk toms ror and zrc
原文地址：http://www.cnblogs.com/flyingcloude/p/6992455.html
