FPGA基础入门程序代码

 1 module flow_led(
 2     input               sys_clk  ,  //系统时钟，外部时钟50M
 3     input               sys_rst_n,  //系统复位，低电平有效
 4      
 5     output  reg  [3:0]  led         //4个LED灯
 6     );
 7 
 8 //reg define
 9 reg [23:0] counter;
10 /*点灯如何实现？首先定义led4位寄存器，对应四个接口。灯接法共地，输出高电平(1)点亮一个灯。
11    如何循环点亮灯?led <= 4‘b0001;即        led[0]=1
12                                         led[1]=0
13                                         led[2]=0
14                                         led[3]=0
15     
16     执行一次{led[2:0],led[3]}取高位与低位拼接,得led<=4‘b0010
17     
18     延时如何实现？首先理解在FPGA的always块是并行执行，但是在always中是顺序执行,即counter == 24‘d1000_0000时(24位十进制数)
19      counter <= 24‘d0;
20      
21      led[3:0] <= {led[2:0],led[3]};
22     
23 
24     */
25 //*****************************************************
26 //**                    main code
27 //***************************************************** 
28                                                                                                                                                                                                                          
29 //计数器对系统时钟计数，计时0.2秒
30 /*
31     t=1/f=1/50,000,000
32     0.2s=t*10000,0000
33 
34     */
35 always @(posedge sys_clk or negedge sys_rst_n) begin
36     if (!sys_rst_n)
37         counter <= 24‘d0;
38     else if (counter < 24‘d1000_0000)
39         counter <= counter + 1‘b1;
40     else
41         counter <= 24‘d0;
42 end
43 
44 //通过移位寄存器控制IO口的高低电平，从而改变LED的显示状态
45 always @(posedge sys_clk or negedge sys_rst_n) begin
46     if (!sys_rst_n)
47         led <= 4‘b0001;
48     else if(counter == 24‘d1000_0000) 
49         led[3:0] <= {led[2:0],led[3]};
50     else
51         led <= led;
52 end
53 
54 endmodule