verilog behavioral modeling --procedural assignments

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1.procedural assignments are used for updating reg ,integer , time ,real,realtime and memory data types.

2.difference between procedural assignments and continuous assignments

   (1)continuous assignments drive nets and are evaluated and updated whenever an input operand changes value.

   (2)procedural assignments update the value of variables under the control of the procedural flow constructs that surround them.

      variables <= / = expression

    variables : 1.reg , integer, real,realtime,time

                    2.bit-select of a reg , integer,time

                   3.part-select of a reg ,integer, time

                   4.memory word

                   5,concatenation or nested concatenation of any of the above

   note:如果左右边数据位宽不一致，需要进行零扩展、符号扩展。

   3.procedural assignments

        ----blocking procedural assignment statements

        ----nonblocking procdedural assignment statements

      blocking and nonblocking procedural assignment statements specify different procedural flows in sequential blocks

 4.blocking assignment vs nonblocking assignments

 5.assign vs deassign

 6.force vs release

verilog behavioral modeling --procedural assignments

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原文地址：http://www.cnblogs.com/chip/p/4073589.html