标签:always bit pos img 运算 code sub end mamicode
fpga做减法的时候,比如两个8位数相减。 在程序里面,写减法的时候。module sub8(a,b,c,clk);
input [7:0] a,b;
output[8:0] c;
input clk;
reg [8:0] c;
always @ ( posedge clk) begin
//c <= a - b;
c <= {a[7], a} - {b[7],b};
end
endmodule
测试模块
module sub8_tb;
reg [7:0] a,b;
wire[8:0] c;
reg clk;
initial begin
clk = 0;
a = 8‘d100;
b = 8‘d17;
#15 ;
a = 8‘d100;
b = -8‘d17;
#15 ;
a = -8‘d100;
b = 8‘d17;
#15 ;
a = -8‘d100;
b = -8‘d17;
// test overflow
#15;
a = 8‘d100; // res should be 132.
b = -8‘d32;
#15;
a = -8‘d100; // res should be -132.
b = 8‘d32;
#20;
$stop;
end
sub8 m0(a,b,c,clk);
always #5 clk = ~clk;
endmodule
截图如下,发现100 和-32做减法,得到132。 同样-100和32做减法也得到了-132。 能够得到正确的结果。
标签:always bit pos img 运算 code sub end mamicode
原文地址:https://blog.51cto.com/14018328/2491538