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(1)自加LED显示代码 本模块用于检测或者验证LED的电路,以及性能,一般人都会用到。
//`timescale 1ns/1ns module led_addr_display
#(
parameter
LED_WIDTH = 8
)
(
//global clock input clk,
input
rst_n,
//user led output output reg [LED_WIDTH-1:0] led_data
);
//----------------------------------- localparam DELAY_TOP = 24‘hff_ffff;
reg
[23:0] delay_cnt;
always
@(
posedge
clk
or
negedge
rst_n)
begin
if
(!rst_n)
delay_cnt <= 0;
else
if
(delay_cnt < DELAY_TOP)
delay_cnt <= delay_cnt +
1‘b1
;
else
delay_cnt <= 0;
end
wire
delay_done = (delay_cnt == DELAY_TOP) ?
1‘b1
:
1‘b0
;
//----------------------------------- always@(posedge clk or negedge rst_n)
begin
if
(!rst_n)
led_data <= 0;
else
if
(delay_done)
led_data <= led_data +
1‘b1
;
else
led_data <= led_data;
end
endmodule
(2)LED外部输入显示
本模块用于外部数据/信号的数据,便于直观的显示结果,方便校验。
`
timescale
1ns/1ns
module
led_input_display
#(
parameter
LED_WIDTH = 8
)
(
//global clock input clk,
input
rst_n,
//user interface for led input led_en,
input
[LED_WIDTH-1:0] led_value,
output
reg
[LED_WIDTH-1:0] led_data
);
//-------------------------------------- always@(posedge clk or negedge rst_n)
begin
if
(!rst_n)
led_data <= {LED_WIDTH{
1‘b0
}};
else
if
(led_en)
led_data <= led_value;
else
led_data <= led_data;
end
endmodule
(3)LED移位流水灯显示
本模块只是一个花样的功能,当然写好一个流水的,也许有很多很多的方法,比如状态机,Case, if else语句,到底哪种方法好与不好,其实事到如今,你应该思考:如何设计电路才是最完美的!例如:
`
timescale
1ns/1ns
module
led_water_display
#(
parameter
LED_WIDTH = 8
)
(
//global clock input clk,
input
rst_n,
//user led output output reg [LED_WIDTH-1:0] led_data
);
//----------------------------------- localparam DELAY_TOP = 24‘hff_ffff;
//localparam DELAY_TOP = 24‘hf;
reg
[23:0] delay_cnt;
always
@(
posedge
clk
or
negedge
rst_n)
begin
if
(!rst_n)
delay_cnt <= 0;
else
if
(delay_cnt < DELAY_TOP)
delay_cnt <= delay_cnt +
1‘b1
;
else
delay_cnt <= 0;
end
wire
delay_done = (delay_cnt == DELAY_TOP) ?
1‘b1
:
1‘b0
;
//-----------------------------------
reg
[2:0] led_cnt;
//led count
reg
left_done, right_done;
//led water done edge
always
@(
posedge
clk
or
negedge
rst_n)
begin
if
(!rst_n)
begin
led_data <= 1;
led_cnt <= 0;
{left_done, right_done} <=
2‘b10
;
end
else
if
(delay_done)
begin
led_cnt <= (led_cnt < LED_WIDTH -
2‘d2
) ? led_cnt +
1‘b1
:
3‘d0
;
//water edge exchange
if
(led_cnt == LED_WIDTH -
2‘d2
)
{left_done, right_done} <= ~{left_done, right_done};
else
{left_done, right_done} <= {left_done, right_done};
//water led exchange case({left_done, right_done})
2‘b10
: led_data <= (led_data << 1);
2‘b01
: led_data <= (led_data >> 1);
default
:;
endcase
end
else
begin
led_data <= led_data;
led_cnt <= led_cnt;
{left_done, right_done} <= {left_done, right_done};
end
end
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原文地址:http://www.cnblogs.com/ffpp/p/4222173.html