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1 @****************************************************************************** 2 @ File：head.S 3 @ 功能：设置SDRAM，将程序复制到SDRAM，然后跳到SDRAM继续执行 4 @****************************************************************************** 5 6 .extern main 7 .text 8 .global _start 9 _start: 10 11 12 Reset: 13 ldr sp, =4096 @ 设置栈指针，以下都是C函数，调用前需要设好栈 14 bl disable_watch_dog @ 关闭WATCHDOG，否则CPU会不断重启 15 bl clock_init @ 设置MPLL，改变FCLK、HCLK、PCLK 16 bl memsetup @ 设置存储控制器以使用SDRAM 17 bl copy_steppingstone_to_sdram @ 复制代码到SDRAM中 18 ldr pc, =on_sdram @ 跳到SDRAM中继续执行 19 20 21 on_sdram: 22 ldr sp, =0x34000000 @ 设置栈指针 23 ldr lr, =halt_loop @ 设置返回地址 24 ldr pc, =main @ 调用main函数 25 26 27 halt_loop: 28 b halt_loop 29 30 31 32
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1 /* 2 * init.c: 进行一些初始化 3 */ 4 5 #include "s3c24xx.h" 6 7 void disable_watch_dog(void); 8 void clock_init(void); 9 void memsetup(void); 10 void copy_steppingstone_to_sdram(void); 11 12 /* 13 * 关闭WATCHDOG，否则CPU会不断重启 14 */ 15 void disable_watch_dog(void) 16 { 17 WTCON = 0; // 关闭WATCHDOG很简单，往这个寄存器写0即可 18 } 19 20 #define S3C2410_MPLL_200MHZ ((0x5c<<12)|(0x04<<4)|(0x00)) 21 #define S3C2440_MPLL_200MHZ ((0x5c<<12)|(0x01<<4)|(0x02)) 22 /* 23 * 对于MPLLCON寄存器，[19:12]为MDIV，[9:4]为PDIV，[1:0]为SDIV 24 * 有如下计算公式： 25 * S3C2410: MPLL(FCLK) = (m * Fin)/(p * 2^s) 26 * S3C2410: MPLL(FCLK) = (2 * m * Fin)/(p * 2^s) 27 * 其中: m = MDIV + 8, p = PDIV + 2, s = SDIV 28 * 对于本开发板，Fin = 12MHz 29 * 设置CLKDIVN，令分频比为：FCLK:HCLK:PCLK=1:2:4， 30 * FCLK=200MHz,HCLK=100MHz,PCLK=50MHz 31 */ 32 void clock_init(void) 33 { 34 // LOCKTIME = 0x00ffffff; // 使用默认值即可 35 CLKDIVN = 0x03; // FCLK:HCLK:PCLK=1:2:4, HDIVN=1,PDIVN=1 36 37 /* 如果HDIVN非0，CPU的总线模式应该从“fast bus mode”变为“asynchronous bus mode” */ 38 __asm__( 39 "mrc p15, 0, r1, c1, c0, 0\n" /* 读出控制寄存器 */ 40 "orr r1, r1, #0xc0000000\n" /* 设置为“asynchronous bus mode” */ 41 "mcr p15, 0, r1, c1, c0, 0\n" /* 写入控制寄存器 */ 42 ); 43 44 /* 判断是S3C2410还是S3C2440 */ 45 if ((GSTATUS1 == 0x32410000) || (GSTATUS1 == 0x32410002)) 46 { 47 MPLLCON = S3C2410_MPLL_200MHZ; /* 现在，FCLK=200MHz,HCLK=100MHz,PCLK=50MHz */ 48 } 49 else 50 { 51 MPLLCON = S3C2440_MPLL_200MHZ; /* 现在，FCLK=200MHz,HCLK=100MHz,PCLK=50MHz */ 52 } 53 } 54 55 /* 56 * 设置存储控制器以使用SDRAM 57 */ 58 void memsetup(void) 59 { 60 volatile unsigned long *p = (volatile unsigned long *)MEM_CTL_BASE; 61 62 /* 这个函数之所以这样赋值，而不是像前面的实验(比如mmu实验)那样将配置值 63 * 写在数组中，是因为要生成”位置无关的代码”，使得这个函数可以在被复制到 64 * SDRAM之前就可以在steppingstone中运行 65 */ 66 /* 存储控制器13个寄存器的值 */ 67 p[0] = 0x22011110; //BWSCON 68 p[1] = 0x00000700; //BANKCON0 69 p[2] = 0x00000700; //BANKCON1 70 p[3] = 0x00000700; //BANKCON2 71 p[4] = 0x00000700; //BANKCON3 72 p[5] = 0x00000700; //BANKCON4 73 p[6] = 0x00000700; //BANKCON5 74 p[7] = 0x00018005; //BANKCON6 75 p[8] = 0x00018005; //BANKCON7 76 77 /* REFRESH, 78 * HCLK=12MHz: 0x008C07A3, 79 * HCLK=100MHz: 0x008C04F4 80 */ 81 p[9] = 0x008C04F4; 82 p[10] = 0x000000B1; //BANKSIZE 83 p[11] = 0x00000030; //MRSRB6 84 p[12] = 0x00000030; //MRSRB7 85 } 86 87 void copy_steppingstone_to_sdram(void) 88 { 89 unsigned int *pdwSrc = (unsigned int *)0; 90 unsigned int *pdwDest = (unsigned int *)0x30000000; 91 92 while (pdwSrc < (unsigned int *)4096) 93 { 94 *pdwDest = *pdwSrc; 95 pdwDest++; 96 pdwSrc++; 97 } 98 }
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1 #include "serial.h" 2 3 int main() 4 { 5 unsigned char c; 6 uart0_init(); // 波特率115200，8N1(8个数据位，无校验位，1个停止位) 7 8 while(1) 9 { 10 // 从串口接收数据后，判断其是否数字或子母，若是则加1后输出 11 c = getc(); 12 if (isDigit(c) || isLetter(c)) 13 putc(c+1); 14 } 15 16 return 0; 17 }
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#include "s3c24xx.h" //所有寄存器的地址 #include "serial.h" // #define TXD0READY (1<<2) #define RXD0READY (1) #define PCLK 50000000 // init.c中的clock_init函数设置PCLK为50MHz #define UART_CLK PCLK // UART0的时钟源设为PCLK #define UART_BAUD_RATE 115200 // 波特率 #define UART_BRD ((UART_CLK / (UART_BAUD_RATE * 16)) - 1) //波特率计算公式 //初始化UART0 /* * 初始化UART0 * 115200,8N1,无流控 */ void uart0_init(void) { //配置引脚 GPHCON |= 0xa0; // GPH2,GPH3用作TXD0,RXD0；配置引脚功能 GPHUP = 0x0c; // GPH2,GPH3内部上拉，上拉使能 //设置传输格式 ULCON0 = 0x03; // 8N1(8个数据位，无较验，1个停止位) //选择时钟源，中断方式或查询方式 UCON0 = 0x05; // 查询方式，UART时钟源为PCLK //是否使用FIFO UFCON0 = 0x00; // 不使用FIFO //是否使用流控 UMCON0 = 0x00; // 不使用流控 //设置波特率 UBRDIV0 = UART_BRD; // 波特率为115200 } //数据传输过程： //发送过程：CPU - 发送FIFO - 发送移位器 - TxDn数据线 //接收过程：RxDn数据线 - 接收移位器 - FIFO - CPU /* * 发送一个字符 */ void putc(unsigned char c) { /* 等待，直到发送缓冲区中的数据已经全部发送出去 */ while (!(UTRSTAT0 & TXD0READY)); //100时发送器发送缓冲器为空，发送完毕 /* 向UTXH0寄存器中写入数据，UART即自动将它发送出去 */ UTXH0 = c; //缓冲区已经发送出去了，现在将需要发送的数据写入 } /* * 接收字符 */ unsigned char getc(void) { /* 等待，直到接收缓冲区中的有数据 */ while (!(UTRSTAT0 & RXD0READY)); /* 直接读取URXH0寄存器，即可获得接收到的数据 */ return URXH0; //数据已经接收到缓冲区了，现在读取到寄存器也就是接收到了发送的数据 } /* * 判断一个字符是否数字 */ int isDigit(unsigned char c) { if (c >= ‘0‘ && c <= ‘9‘) return 1; else return 0; } /* * 判断一个字符是否英文字母 */ int isLetter(unsigned char c) { if (c >= ‘a‘ && c <= ‘z‘) return 1; else if (c >= ‘A‘ && c <= ‘Z‘) return 1; else return 0; }
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1 void uart0_init(void); 2 void putc(unsigned char c); 3 unsigned char getc(void); 4 int isDigit(unsigned char c); 5 int isLetter(unsigned char c);
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1 objs := head.o init.o serial.o main.o 2 3 uart.bin: $(objs) 4 arm-linux-ld -Tuart.lds -o uart_elf $^ 5 arm-linux-objcopy -O binary -S uart_elf $@ 6 arm-linux-objdump -D -m arm uart_elf > uart.dis 7 8 %.o:%.c 9 arm-linux-gcc -Wall -O2 -c -o $@ $< 10 11 %.o:%.S 12 arm-linux-gcc -Wall -O2 -c -o $@ $< 13 14 clean: 15 rm -f uart.bin uart_elf uart.dis *.o 16
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SECTIONS { . = 0x30000000; .text : { *(.text) } .rodata ALIGN(4) : {*(.rodata)} .data ALIGN(4) : { *(.data) } .bss ALIGN(4) : { *(.bss) *(COMMON) } }
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1 /* WOTCH DOG register */ 2 #define WTCON (*(volatile unsigned long *)0x53000000) 3 4 /* SDRAM regisers */ 5 #define MEM_CTL_BASE 0x48000000 6 #define SDRAM_BASE 0x30000000 7 8 /* NAND Flash registers */ 9 #define NFCONF (*(volatile unsigned int *)0x4e000000) 10 #define NFCMD (*(volatile unsigned char *)0x4e000004) 11 #define NFADDR (*(volatile unsigned char *)0x4e000008) 12 #define NFDATA (*(volatile unsigned char *)0x4e00000c) 13 #define NFSTAT (*(volatile unsigned char *)0x4e000010) 14 15 /*GPIO registers*/ 16 #define GPBCON (*(volatile unsigned long *)0x56000010) 17 #define GPBDAT (*(volatile unsigned long *)0x56000014) 18 19 #define GPFCON (*(volatile unsigned long *)0x56000050) 20 #define GPFDAT (*(volatile unsigned long *)0x56000054) 21 #define GPFUP (*(volatile unsigned long *)0x56000058) 22 23 #define GPGCON (*(volatile unsigned long *)0x56000060) 24 #define GPGDAT (*(volatile unsigned long *)0x56000064) 25 #define GPGUP (*(volatile unsigned long *)0x56000068) 26 27 #define GPHCON (*(volatile unsigned long *)0x56000070) 28 #define GPHDAT (*(volatile unsigned long *)0x56000074) 29 #define GPHUP (*(volatile unsigned long *)0x56000078) 30 31 32 33 /*UART registers*/ 34 #define ULCON0 (*(volatile unsigned long *)0x50000000) 35 #define UCON0 (*(volatile unsigned long *)0x50000004) 36 #define UFCON0 (*(volatile unsigned long *)0x50000008) 37 #define UMCON0 (*(volatile unsigned long *)0x5000000c) 38 #define UTRSTAT0 (*(volatile unsigned long *)0x50000010) 39 #define UTXH0 (*(volatile unsigned char *)0x50000020) 40 #define URXH0 (*(volatile unsigned char *)0x50000024) 41 #define UBRDIV0 (*(volatile unsigned long *)0x50000028) 42 43 44 /*interrupt registes*/ 45 #define SRCPND (*(volatile unsigned long *)0x4A000000) 46 #define INTMOD (*(volatile unsigned long *)0x4A000004) 47 #define INTMSK (*(volatile unsigned long *)0x4A000008) 48 #define PRIORITY (*(volatile unsigned long *)0x4A00000c) 49 #define INTPND (*(volatile unsigned long *)0x4A000010) 50 #define INTOFFSET (*(volatile unsigned long *)0x4A000014) 51 #define SUBSRCPND (*(volatile unsigned long *)0x4A000018) 52 #define INTSUBMSK (*(volatile unsigned long *)0x4A00001c) 53 54 /*external interrupt registers*/ 55 #define EINTMASK (*(volatile unsigned long *)0x560000a4) 56 #define EINTPEND (*(volatile unsigned long *)0x560000a8) 57 58 /*clock registers*/ 59 #define LOCKTIME (*(volatile unsigned long *)0x4c000000) 60 #define MPLLCON (*(volatile unsigned long *)0x4c000004) 61 #define UPLLCON (*(volatile unsigned long *)0x4c000008) 62 #define CLKCON (*(volatile unsigned long *)0x4c00000c) 63 #define CLKSLOW (*(volatile unsigned long *)0x4c000010) 64 #define CLKDIVN (*(volatile unsigned long *)0x4c000014) 65 66 67 /*PWM & Timer registers*/ 68 #define TCFG0 (*(volatile unsigned long *)0x51000000) 69 #define TCFG1 (*(volatile unsigned long *)0x51000004) 70 #define TCON (*(volatile unsigned long *)0x51000008) 71 #define TCNTB0 (*(volatile unsigned long *)0x5100000c) 72 #define TCMPB0 (*(volatile unsigned long *)0x51000010) 73 #define TCNTO0 (*(volatile unsigned long *)0x51000014) 74 75 #define GSTATUS1 (*(volatile unsigned long *)0x560000B0)
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原文地址：http://www.cnblogs.com/liubo118/p/4305295.html
