Reserved space (invalid address) is protected against abnormal access. Reads from invalid address return garbage; writes to invalid address are blocked. Access to reserved space can generate exceptions, this is very helpful for
capturing bug of software.
DSP core reads from any invalid address will always trigger L1D memory protection exception because this access finally goes through L1D controller.
DSP core executes from invalid address will trigger Instruction fetch exception.
For invalid write, depends on the address, different exception event will be triggered.
When DMA access invalid address, bus error will also be reported in the DMA module. The DMA error event can also be routed to DSP core as exception.
