QS之vsim

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vsim - The vsim command invokes the VSIM simulator

-t [<multiplier>]<time_unit>
　　(optional) Specifies the simulator time resolution. <time_unit> must be one of the following:
　　　　fs, ps, ns, us, ms, sec
　　The default is 1ns; the optional <multiplier> may be 1, 10 or 100.

　　Note that there is no space between the multiplier and the unit (for example, 10fs, not 10 fs).

 -L <library_name> …

　　(optional) Specifies the library to search for design units instantiated from Verilog and for VHDL default component binding. If multiple libraries are specified, each must be preceded by the -L option. 

# compile testbench file

vcom -93 -explicit -work work $srcpath_0/tb_xxx.vhd 

# run simulation

vsim -L xxx -t 1ps tb_xxx

QS之vsim

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原文地址：http://www.cnblogs.com/mengdie/p/4432588.html