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#elif defined (ON_BOARD_16M_FLASH_COMPONENT)
#define PHYS_FLASH_1 0xBCC00000 /* Image1 Bank #1 */
#define PHYS_FLASH_2 0xBC000000 /* Image1 Bank #2 */
#define PHYS_FLASH2_1 0xBC400000 /* Image2 Bank #1 */
#define PHYS_FLASH2_2 0xBC800000 /* Image2 Bank #2 */
#endif
#else //Non Dual Image
#ifdef ON_BOARD_8M_FLASH_COMPONENT
#define PHYS_FLASH_1 0xBC400000 /* Flash Bank #1 */
#else
#define PHYS_FLASH_1 0xBCC00000 /* Flash Bank #1 */
#endif
#define PHYS_FLASH_2 0xBC000000 /* Flash Bank #2 */
#if defined (ON_BOARD_8M_FLASH_COMPONENT) || defined (ON_BOARD_16M_FLASH_COMPONENT)
#define PHYS_FLASH_START PHYS_FLASH_2 /* Address for issuing flash command */
#else
#define PHYS_FLASH_START PHYS_FLASH_1 /* Address for issuing flash command */
#endif
#endif
#elif defined (RT2883_FPGA_BOARD) || defined (RT2883_ASIC_BOARD) || \
defined (RT3883_FPGA_BOARD) || defined (RT3883_ASIC_BOARD) || \
defined (RT3352_FPGA_BOARD) || defined (RT3352_ASIC_BOARD) || \
defined (RT5350_FPGA_BOARD) || defined (RT5350_ASIC_BOARD) || \
defined (RT6855_FPGA_BOARD) || defined (RT6855_ASIC_BOARD) || \
defined (MT7620_FPGA_BOARD) || defined (MT7620_ASIC_BOARD) || \
defined (MT7621_FPGA_BOARD) || defined (MT7621_ASIC_BOARD)
#define PHYS_FLASH_START 0xBC000000 /* Flash Bank #2 */
#define PHYS_FLASH_1 0xBC000000 /* Flash Bank #1 */
#ifdef DUAL_IMAGE_SUPPORT
#if defined (ON_BOARD_2M_FLASH_COMPONENT)
#define PHYS_FLASH2_1 0xBC100000 /* Flash Bank #2 */
#elif defined (ON_BOARD_4M_FLASH_COMPONENT)
#define PHYS_FLASH2_1 0xBC200000 /* Flash Bank #2 */
#elif defined (ON_BOARD_8M_FLASH_COMPONENT)
#define PHYS_FLASH2_1 0xBC400000 /* Flash Bank #2 */
#define CFG_EMBEDED_SRAM_START 0xA0800000
#define CFG_EMBEDED_SRAM_FOR_RXRING0_DESC 0xA0800000
#define CFG_EMBEDED_SRAM_FOR_TXRING0_DESC 0xA0800100
#define CFG_EMBEDED_SRAM_FOR_TXRING1_DESC 0xA0800200
#define CFG_EMBEDED_SRAM_BUF_START 0xA0800300
#define CFG_EMBEDED_SRAM_SDP0_BUF_START 0xA0804000
#define CFG_EMBEDED_SRAM_END 0xA0807FFF
#define PHYS_FLASH2_1 0xBC000000 /* Image2 Bank #1 */
#elif defined (ON_BOARD_16M_FLASH_COMPONENT)
#define PHYS_FLASH_1 0xBCC00000 /* Image1 Bank #1 */
#define PHYS_FLASH_2 0xBC000000 /* Image1 Bank #2 */
#define PHYS_FLASH2_1 0xBC400000 /* Image2 Bank #1 */
#define PHYS_FLASH2_2 0xBC800000 /* Image2 Bank #2 */
#endif
#else //Non Dual Image
#ifdef ON_BOARD_8M_FLASH_COMPONENT
#define PHYS_FLASH_1 0xBC400000 /* Flash Bank #1 */
#else
#define PHYS_FLASH_1 0xBCC00000 /* Flash Bank #1 */
#endif
#define PHYS_FLASH_2 0xBC000000 /* Flash Bank #2 */
#if defined (ON_BOARD_8M_FLASH_COMPONENT) || defined (ON_BOARD_16M_FLASH_COMPONENT)
#define PHYS_FLASH_START PHYS_FLASH_2 /* Address for issuing flash command */
#else
#define PHYS_FLASH_START PHYS_FLASH_1 /* Address for issuing flash command */
#endif
#endif
#elif defined (RT2883_FPGA_BOARD) || defined (RT2883_ASIC_BOARD) || \
defined (RT3883_FPGA_BOARD) || defined (RT3883_ASIC_BOARD) || \
defined (RT3352_FPGA_BOARD) || defined (RT3352_ASIC_BOARD) || \
defined (RT5350_FPGA_BOARD) || defined (RT5350_ASIC_BOARD) || \
defined (RT6855_FPGA_BOARD) || defined (RT6855_ASIC_BOARD) || \
defined (MT7620_FPGA_BOARD) || defined (MT7620_ASIC_BOARD) || \
defined (MT7621_FPGA_BOARD) || defined (MT7621_ASIC_BOARD)
#define PHYS_FLASH_START 0xBC000000 /* Flash Bank #2 */
#define PHYS_FLASH_1 0xBC000000 /* Flash Bank #1 */
#ifdef DUAL_IMAGE_SUPPORT
#if defined (ON_BOARD_2M_FLASH_COMPONENT)
#define PHYS_FLASH2_1 0xBC100000 /* Flash Bank #2 */
#elif defined (ON_BOARD_4M_FLASH_COMPONENT)
#define PHYS_FLASH2_1 0xBC200000 /* Flash Bank #2 */
#elif defined (ON_BOARD_8M_FLASH_COMPONENT)
#define PHYS_FLASH2_1 0xBC400000 /* Flash Bank #2 */
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原文地址:http://www.cnblogs.com/liujinghuan/p/2be7664689711a622bc39c2f57b2a363.html