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PowerPC平台 u-boot 移植

时间:2015-05-27 21:14:24      阅读:333      评论:0      收藏:0      [点我收藏+]

标签:powerpc   u-boot   linux   p1010   etsec   

PowerPC功能很强的通信处理器,支持1000M以太网接口,以Freescale的P1010处理器为开发平台,讲述移植linux的整个过程,与大家分享。

1.配置交叉编译链
    网上下载交叉编译工具,配置环境变量
    sudo gedit /etc/environment
    在末尾添加交叉编译链路径
    :/home/freescale/work/tools/freescale/bin
    log out(不需要重启),输入如下,验证交叉编译是否安装成功:
freescale@freescale-sdk:~/work/u-boot$ powerpc-linux-gnu-gcc -v
Using built-in specs.
COLLECT_GCC=powerpc-linux-gnu-gcc
........
gcc version 4.5.1 (Sourcery G++ Lite 2010.09-55)
freescale@freescale-sdk:~/work/u-boot$ 


2.新增单板
freescale@freescale-sdk:~/work/source/u-boot-2010.12$ make distclean
freescale@freescale-sdk:~/work/source/u-boot-2010.12$ cd board/freescale/
freescale@freescale-sdk:~/work/source/u-boot-2010.12/board/freescale$ cp p1010rdb p1010acce -rf
freescale@freescale-sdk:~/work/source/u-boot-2010.12/board/freescale$ cd ../..
freescale@freescale-sdk:~/work/source/u-boot-2010.12$ cd include/configs/   
freescale@freescale-sdk:~/work/source/u-boot-2010.12/include/configs$ cp P1010RDB.h P1010BOARD.h
freescale@freescale-sdk:~/work/source/u-boot-2010.12/include/configs$ cd ../..
freescale@freescale-sdk:~/work/source/u-boot-2010.12$ vim boards.cfg
add:
P1010BOARD_NOR                powerpc     mpc85xx     p1010acce           freescale      -           P1010BOARD:P1010BOARD
freescale@freescale-sdk:~/work/source/u-boot-2010.12$ make P1010BOARD_NOR_config
Configuring for P1010BOARD_NOR - Board: P1010BOARD, Options: P1010BOARD
freescale@freescale-sdk:~/work/source/u-boot-2010.12$
freescale@freescale-sdk:~/work/source/u-boot-2010.12$ make
Generating include/autoconf.mk
/home/freescale/work/source/u-boot-2010.12/include/asm/config_mpc85xx.h:328:2: error: #error Processor type not defined for this platform
Generating include/autoconf.mk.dep
/home/freescale/work/source/u-boot-2010.12/include/asm/config_mpc85xx.h:328:2: error: #error Processor type not defined for this platform
powerpc-linux-gnu-gcc -DDO_DEPS_ONLY \
        -g  -Os   -mrelocatable -ffunction-sections -fdata-sections -fPIC -meabi -D__KERNEL__ -DCONFIG_SYS_TEXT_BASE=0xeff80000 -I/home/freescale/work/source/u-boot-2010.12/include -fno-builtin -ffreestanding -nostdinc -isystem /home/freescale/work/tools/freescale-2010.09/bin/../lib/gcc/powerpc-linux-gnu/4.5.1/include -pipe  -DCONFIG_PPC -D__powerpc__ -ffixed-r2 -Wa,-me500 -msoft-float -mno-string  -mno-spe -Wall -Wstrict-prototypes -fno-stack-protector   \
        -o lib/asm-offsets.s lib/asm-offsets.c -c -S
In file included from /home/freescale/work/source/u-boot-2010.12/include/asm/config.h:25:0,
                 from /home/freescale/work/source/u-boot-2010.12/include/config.h:6,
                 from /home/freescale/work/source/u-boot-2010.12/include/common.h:37,
                 from lib/asm-offsets.c:18:
/home/freescale/work/source/u-boot-2010.12/include/asm/config_mpc85xx.h:328:2: error: #error Processor type not defined for this platform
make: *** [lib/asm-offsets.s] Error 1
freescale@freescale-sdk:~/work/source/u-boot-2010.12$
编译报错,修改如下:
solutions:
freescale@freescale-sdk:~/work/source/u-boot-2010.12$ vim boards.cfg
P1010BOARD_NOR                powerpc     mpc85xx     p1010acce           freescale      -           P1010BOARD:P1010RDB
继续编译,成功生成u-boot.bin
freescale@freescale-sdk:~/work/source/u-boot-2010.12$ make P1010BOARD_NOR
........
.5.1/nof -lgcc -Map u-boot.map -o u-boot
powerpc-linux-gnu-objcopy -O srec u-boot u-boot.srec
powerpc-linux-gnu-objcopy --gap-fill=0xff -O binary u-boot u-boot.bin
freescale@freescale-sdk:~/work/source/u-boot-2010.12$

3.修改配置支持DDR3
烧写上面生成的u-boot.bin(0xfff80000),配置串口 115200 8 n 1,打印如下:
U-Boot 2013.01-dirty (May 18 2015 - 20:04:36)

CPU:   P1010, Version: 1.0, (0x80f10010)
Core:  E500, Version: 5.1, (0x80212151)
Clock Configuration:
       CPU0:800  MHz,
       CCB:400  MHz,
       DDR:200  MHz (400 MT/s data rate) (Synchronous), IFC:100  MHz
L1:    D-cache 32 kB enabled
       I-cache 32 kB enabled
Board: P1010RDB
I2C:   ready
SPI:   ready
DRAM:  DDR: failed to read SPD from address 82
SPD error on controller 0! Trying fallback to raw timing calculation
Detected UDIMM Fixed DDR on board
The choosen cas latency 5 is too large
1 GiB (DDR3, 32-bit, CL=5, ECC off)
Flash: 32 MiB
L2:    256 KB enabled
NAND:  16 MiB
MMC:  FSL_SDHC: 0
*** Warning - bad CRC, using default environment

PCIe1: Root Complex of mini PCIe Slot, no link, regs @ 0xffe0a000
PCIe1: Bus 00 - 00
PCIe2: Root Complex of PCIe Slot, no link, regs @ 0xffe09000
PCIe2: Bus 01 - 01
In:    serial
Out:   serial
Err:   serial
Net:   PHY reset timed out
PHY reset timed out
PHY reset timed out
eTSEC1 [PRIME], eTSEC2, eTSEC3
Hit any key to stop autoboot:  0
系统启动不稳定,经常卡死。log打印显示DDR配置失败。DDR: failed to read SPD from address 82
跟踪代码
_start:
    bl    cpu_init_early_f
    bl    cpu_init_f
        init_early_memctl_regs();
    bl    board_init_f
    Board.c (...\u-boot-2010.12\arch\powerpc\lib)    27583    2015/5/18
    for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
        if ((*init_fnc_ptr) () != 0) {
            hang ();
        }
        probecpu,
        board_early_init_f,
        init_timebase,
        env_init,
        init_baudrate,
        serial_init,
        console_init_f,
        display_options,
        checkcpu,
        checkboard,INIT_FUNC_WATCHDOG_RESET
        init_func_i2c,
        init_func_spi,
        INIT_FUNC_WATCHDOG_RESET
        init_func_ram,
            puts ("DRAM:  ");
            initdram (0)
            Cpu.c (...\u-boot-2010.12\arch\powerpc\cpu\mpc85xx)    14954    2015/5/18
                #if    defined(CONFIG_SPD_EEPROM)    || \
                    defined(CONFIG_DDR_SPD)        || \
                    defined(CONFIG_DDR_RAW_TIMING)
                    dram_size = fsl_ddr_sdram();
                #else
                    dram_size = fixed_sdram();
                #endif
比对P1010rdb单板,新建单板没有使用SPD,利用ERROE_ROM存储DDR配置信息,去掉SPD相关宏,修改如下:
P1010BOARD.h
/* DDR Setup */
#define CONFIG_FSL_DDR3
/*#define CONFIG_DDR_RAW_TIMING
#define CONFIG_DDR_SPD
#define CONFIG_SYS_SPD_BUS_NUM        1*/
#define SPD_EEPROM_ADDRESS        0x52
修改Ddr.c (....\u-boot-2010.12\board\freescale\p1010acce)    7474    5/23/2015
    ddr_freq = get_ddr_freq(0);
modified to    
    ddr_freq = 667*1000000;//配置成667MHz


4.编译烧写单板,系统启动正常
U-Boot 2010.12 (May 23 2015 - 13:59:51)

CPU:   P1010, Version: 1.0, (0x80f10010)
Core:  E500, Version: 5.1, (0x80212151)
Clock Configuration:
       CPU0:800  MHz,
       CCB:400  MHz,
ddr_ratio = 7
       DDR:200  MHz (400 MT/s data rate) (Synchronous), IFC:100  MHz
L1:    D-cache 32 kB enabled
       I-cache 32 kB enabled
Board: P1010RDB
I2C:   ready
SPI:   ready
DRAM:  Configuring DDR for 667 MT/s data rate
DDR: 1 GiB (DDR3, 32-bit, CL=5, ECC off)
FLASH: 32 MiB
L2:    256 KB enabled
NAND:  NAND device: Manufacturer ID: 0x53, Chip ID: 0x53 (Unknown NAND 16MiB 3,3V 16-bit)
NAND bus width 8 instead 16 bit
No NAND device found!!!
0 MiB
*** Warning - bad CRC, using default environment

PCIe1: Root Complex of mini PCIe Slot, no link, regs @ 0xffe0a000
PCIe1: Bus 00 - 00
PCIe2: Root Complex of PCIe Slot, no link, regs @ 0xffe09000
PCIe2: Bus 01 - 01
In:    serial
Out:   serial
Err:   serial
Net:   PHY reset timed out
PHY reset timed out
PHY reset timed out
eTSEC1 [PRIME], eTSEC2, eTSEC3
Hit any key to stop autoboot:  0

5.修改网卡驱动,支持phy ar8033
(1)根据单板修改phy地址
P1010BOARD.h:
#define TSEC1_PHY_ADDR        1
#define TSEC2_PHY_ADDR        6/*0->6*/
#define TSEC3_PHY_ADDR        4/*2->4*/
增加宏
Miiphyutil.c (...\u-boot\common)    42:
#define MII_DEBUG
编译烧写,调试log如下:
Net:   miiphy_register: added ‘eTSEC1‘, read=0x3ff618d8, write=0x3ff61884
eTSEC1: No support for PHY id ffffffff; assuming generic
miiphy_register: added ‘eTSEC2‘, read=0x3ff618d8, write=0x3ff61884
eTSEC2: No support for PHY id 4dd074; assuming generic
miiphy_register: added ‘eTSEC3‘, read=0x3ff618d8, write=0x3ff61884
eTSEC3: No support for PHY id 4dd074; assuming generic
eTSEC1, eTSEC2, eTSEC3
Hit any key to stop autoboot:  0
=>
u-boot不支持单板的phy,分析phy启动增加phy ar8033支持
(2)分析phy驱动
start.S
    bl    board_init_r
        puts ("Net:   ");
        eth_initialize (bd);
            miiphy_init();
            board_eth_init
                tsec_eth_init(bis, tsec_info, num);
                    tsec_initialize(bis, &tsecs[i]);
                        eth_register(dev);
                        miiphy_register(dev->name, tsec_miiphy_read, tsec_miiphy_write);
                                debug ("miiphy_register: added ‘%s‘, read=0x%08lx, write=0x%08lx\n",
                                new_dev->name, new_dev->read, new_dev->write);
                        init_phy(dev);
                            get_phy_info(dev);
                                /* loop through all the known PHY types, and find one that */
                                /* matches the ID we read from the PHY. */
                                for (i = 0; phy_info[i]; i++) {
                                    if (phy_info[i]->id == (phy_ID >> phy_info[i]->shift)) {
                                        theInfo = phy_info[i];
                                        break;
                                    }
                                }
Tsec.c (.....\u-boot-2010.12\drivers\net)    57620    2015/5/18
phy_info数组没有支持ar8033,增加phy支持:
add:
struct phy_info phy_info_AR8033 =  {
        0x4dd074,
        "AR8033",
        0,
        (struct phy_cmd[]) { /* config */
                {PHY_BMCR, PHY_BMCR_RESET, NULL},
                {PHY_BMCR, PHY_BMCR_AUTON|PHY_BMCR_RST_NEG, NULL},
                {0x1d, 0x05, NULL},
                {0x1e, 0x3D47, NULL},
                {miim_end,}
        },
        (struct phy_cmd[]) { /* startup */
                {PHY_BMSR, miim_read, NULL},
                {PHY_BMSR, miim_read, &mii_parse_sr},
                {PHY_BMSR, miim_read, &mii_parse_link},
                {miim_end,}
        },
        (struct phy_cmd[]) { /* shutdown */
                {miim_end,}
        }
};
static struct phy_info *phy_info[] = {
2060 add:
    &phy_info_AR8033,
重新编译,烧写调试:
U-Boot 2010.12 (May 23 2015 - 16:06:42)

CPU:   P1010, Version: 1.0, (0x80f10010)
Core:  E500, Version: 5.1, (0x80212151)
Clock Configuration:
       CPU0:800  MHz,
       CCB:400  MHz,
       DDR:200  MHz (400 MT/s data rate) (Synchronous), IFC:100  MHz
L1:    D-cache 32 kB enabled
       I-cache 32 kB enabled
Board: P1010RDB
I2C:   ready
SPI:   ready
DRAM:  Configuring DDR for 667 MT/s data rate
DDR: 1 GiB (DDR3, 32-bit, CL=5, ECC off)
FLASH: 32 MiB
L2:    256 KB enabled
NAND:  NAND device: Manufacturer ID: 0x53, Chip ID: 0x53 (Unknown NAND 16MiB 3,3V 16-bit)
NAND bus width 8 instead 16 bit
No NAND device found!!!
0 MiB
PCIe1: Root Complex of mini PCIe Slot, no link, regs @ 0xffe0a000
PCIe1: Bus 00 - 00
PCIe2: Root Complex of PCIe Slot, no link, regs @ 0xffe09000
PCIe2: Bus 01 - 01
In:    serial
Out:   serial
Err:   serial
Net:   miiphy_register: added ‘eTSEC1‘, read=0x3ff618d0, write=0x3ff6187c
eTSEC1: No support for PHY id ffffffff; assuming generic
miiphy_register: added ‘eTSEC2‘, read=0x3ff618d0, write=0x3ff6187c
eTSEC2: PHY is AR8033 (4dd074)
miiphy_register: added ‘eTSEC3‘, read=0x3ff618d0, write=0x3ff6187c
eTSEC3: PHY is AR8033 (4dd074)
eTSEC1, eTSEC2, eTSEC3
Hit any key to stop autoboot:  0
=>


6.测试如下:
=> setenv ethaddr 00:04:9f:ef:01:01
=> setenv eth1addr 00:04:9f:ef:01:02
=> setenv eth2addr 00:04:9f:ef:01:03
=>
=> setenv ipaddr 192.168.2.21
=> setenv serverip 192.168.2.242
=> setenv netmask 255.255.255.0
=> setenv ethact eTSEC2
=> ping $serverip
Speed: 100, full duplex
Using eTSEC2 device
host 192.168.2.242 is alive
=> saveenv
Saving Environment to Flash...
Un-Protected 1 sectors
Erasing Flash...
. done
Erased 1 sectors
Writing to Flash... 9....8....7....6....5....4....3....2....1....9....8....7....6....5....4....3....2....1....done
Protected 1 sectors
=>setenv ethact eTSEC3
=> ping $serverip
=>setenv ethact eTSEC2
=>ping $serverip
=>setenv ethact eTSEC1
=>ping $serverip
测试eTSEC2 eTSEC3都能ping通
下面测试tftp更新重新,均正常。
=> tftp 0x1000000 u-boot.bin
Speed: 1000, full duplex
Using eTSEC1 device
TFTP from server 192.168.2.242; our IP address is 192.168.2.21
Filename ‘u-boot.bin‘.
Load address: 0x1000000
Loading: T T T T T T T T T T
Retry count exceeded; starting again
Speed: 100, full duplex
Using eTSEC2 device
TFTP from server 192.168.2.242; our IP address is 192.168.2.21
Filename ‘u-boot.bin‘.
Load address: 0x1000000
Loading: ####################################
done
Bytes transferred = 524288 (80000 hex)
=> protect off all  
Un-Protect Flash Bank # 1
=> erase 0xeff80000 0xefffffff

.... done
Erased 4 sectors
=> cp.b 0x1000000 0xeff80000 0x80000
Copy to Flash... 9....8....7....6....5....4....3....2....1....done
=>
更新完u-boot重新断电重启,系统正常启动,u-boot移植基本实现,下一步移植linux。
U-Boot 2010.12 (May 23 2015 - 17:02:30)

CPU:   P1010, Version: 1.0, (0x80f10010)
Core:  E500, Version: 5.1, (0x80212151)
Clock Configuration:
       CPU0:800  MHz,
       CCB:400  MHz,
       DDR:200  MHz (400 MT/s data rate) (Synchronous), IFC:100  MHz
L1:    D-cache 32 kB enabled
       I-cache 32 kB enabled
Board: P1010RDB
I2C:   ready
SPI:   ready
DRAM:  Configuring DDR for 667 MT/s data rate
DDR: 1 GiB (DDR3, 32-bit, CL=5, ECC off)
FLASH: 32 MiB
L2:    256 KB enabled
NAND:  NAND device: Manufacturer ID: 0x53, Chip ID: 0x53 (Unknown NAND 16MiB 3,3V 16-bit)
NAND bus width 8 instead 16 bit
No NAND device found!!!
0 MiB
PCIe1: Root Complex of mini PCIe Slot, no link, regs @ 0xffe0a000
PCIe1: Bus 00 - 00
PCIe2: Root Complex of PCIe Slot, no link, regs @ 0xffe09000
PCIe2: Bus 01 - 01
In:    serial
Out:   serial
Err:   serial
Net:   eTSEC1: No support for PHY id ffffffff; assuming generic
eTSEC2: PHY is AR8033 (4dd074)
eTSEC3: PHY is AR8033 (4dd074)
eTSEC1, eTSEC2, eTSEC3
Hit any key to stop autoboot:  0
=> printenv
baudrate=115200
bdev=sda1
bootcmd=setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs; tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr
bootdelay=10
bootfile=uImage
consoledev=ttyS0
eth1addr=00:04:9f:ef:01:02
eth2addr=00:04:9f:ef:01:03
ethact=eTSEC1
ethaddr=00:04:9f:ef:01:01
fdtaddr=c00000
fdtfile=p1010rdb.dtb
hostname=P1010RDB
hwconfig=usb1:dr_mode=host,phy_type=utmi
ipaddr=192.168.2.21
loadaddr=1000000
netdev=eth0
netmask=255.255.255.0
othbootargs=ramdisk_size=600000
ramboot=setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs; tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr
ramdiskaddr=2000000
ramdiskfile=rootfs.ext2.gz.uboot
rootpath=/opt/nfsroot
serverip=192.168.2.242
uboot=u-boot.bin
usbext2boot=setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs; usb start;ext2load usb 0:4 $loadaddr $bootfile;ext2load usb 0:4 $fdtaddr $fdtfile;ext2load usb 0:4 $ramdiskaddr $ramdiskfile;bootm $loadaddr $ramdiskaddr $fdtaddr
usbfatboot=setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs; usb start;fatload usb 0:2 $loadaddr $bootfile;fatload usb 0:2 $fdtaddr $fdtfile;fatload usb 0:2 $ramdiskaddr $ramdiskfile;bootm $loadaddr $ramdiskaddr $fdtaddr

Environment size: 1438/8188 bytes
=>

PowerPC平台 u-boot 移植

标签:powerpc   u-boot   linux   p1010   etsec   

原文地址:http://blog.csdn.net/u010216127/article/details/46050627

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