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Verification之PSL之use

时间:2015-06-05 21:06:15      阅读:103      评论:0      收藏:0      [点我收藏+]

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1  Where can PSl be used?

  • Documentation
    – Requirements
    – RTL Designs

  • Controllers
    – Memories, FIFOs, DMAs, bus controllers

  • Finite State Machines (FSMs)
    – Illegal states, sequence, correct encoding scheme

  • Application Algorithms
    – Data transformations (in simulation, not for FV)
    – Testbench designs

  • Black-Box Interfaces
    – Protocols and interfaces (e.g., PCI bus, AHBA ARM bus)

  • Verification (white-box, black-box, functional coverage)
    – Simulation
    – Formal verification tools

 

2  PSl in Formal Ferification Environment

  技术分享

 

Verification之PSL之use

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原文地址:http://www.cnblogs.com/mengdie/p/4555550.html

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