Tcl之Read files for synthesis

 1 set srcbasic          ${HDLPATH}/01_VHDLBasiclib
 2 set srcasictop        ${HDLPATH}/02_ASIC/01_Top
 3 set srcrfid           ${HDLPATH}/02_ASIC/02_RFID
 4 set srcmsp            ${HDLPATH}/02_ASIC/03_MSP430
 5 set srcperiph         ${HDLPATH}/02_ASIC/04_Periph
 6 set srcopenmsp        ${srcmsp}/openmsp430/core/rtl/verilog
 7 
 8 
 9 set_attribute hdl_search_path  "${srcmsp}/include"
10 
11 # filelists
12 set fileListBasicLib  "
13     ... ...
14 $srcbasic/pkg_types.vhd          
15 $srcbasic/ffd.vhd 
16     ... ...
17 "
18 
19 set fileListCommon "
20     ... ...
21 $srcasictop/pkg_infil.vhd
22 $srcasictop/xfabmem_ent.vhd
23     ... ...
24 "
25 
26 set fileList15693 "
27 $srcrfid/iso15693/pkg_iso15693cmd.vhd
28 $srcrfid/iso15693/rx15693sym.vhd
29     ... ...
30 "
31 set fileList14443  "
32 $srcrfid/iso14443/pkg_iso14443cmd.vhd
33 $srcrfid/iso14443/rx14443byte.vhd
34     ... ...
35 "
36 
37 set fileListRFID "
38     ... ...
39 $srcrfid/fifo.vhd
40     ... ...
41 "
42 
43 set fileListOpenMspXFAB "
44 $srcmsp/omsp_and_gate.vhd
45 $srcmsp/omsp_clock_gate.vhd
46 "
47 
48 set fileListOpenMsp "
49     ... ...
50 $srcopenmsp/omsp_clock_mux.v
51 $srcopenmsp/omsp_clock_module.v
52     ... ...
53 "
54 
55 set fileListPeriph "
56 $srcmsp/gpio/msp_io.vhd
57     ... ...
58 "
59 
60 set fileListMsp "
61     ... ...
62 $srcmsp/msp430asic.vhd
63 "
64 
65 set fileListTop "
66     ... ...
67 $srcasictop/infil.vhd
68 "
69 
70 read_hdl -vhdl  ${fileListBasicLib}    -library  edclib
71 read_hdl -vhdl  ${fileListCommon}
72 read_hdl -vhdl  ${fileList15693}
73 read_hdl -vhdl  ${fileList14443}
74 read_hdl -vhdl  ${fileListRFID}
75 read_hdl -vhdl  ${fileListOpenMspXFAB}
76 read_hdl -v2001 ${fileListOpenMsp}
77 read_hdl -vhdl  ${fileListPeriph}
78 read_hdl -vhdl  ${fileListMsp}
79 read_hdl -vhdl  ${fileListTop}